STEVAL-FKI868V1 STMicroelectronics

S T E VA L - F K I 8 6 8 V 1 Sub-1 GHz transceiver development kit based on S2-LP Data brief USB interface RoHS compliant Description The STEVAL-FKI868V1 evaluation board is based on the S2-LP sub-1 GHz ultra-low power low data-rate transceiver, suitable for ISM bands and Wireless M-Bus. The main board is the NUCLEO-L152RE development board, equipped with a low power microcontroller STM32L to control the S2-LP and the ST-LINK/V2-1 debugger and programmer for firmware updating. Features S2-LP narrow band ultra-low power sub-1 GHz transceiver in a standalone RF Module tuned for 860 - 940 MHz frequency bands STM32 Nucleo development board with STM32L152RE MCU Suitable for Wireless M-Bus systems Associated S2-LP development kit including, documentation, firmware for STM32L and GUI Programmable RF output power up to +16 dBm Modulation schemes: 2-FSK, 2-GFSK, 4- FSK, 4-GFSK, OOK, and ASK Air data rate from 0.3 to 500 kbps Ultra-low power consumption: 6.7 mA RX 10 mA TX at +10 dBm Excellent performance of receiver sensitivity (up to -130 dBm) Low duty cycle RX / TX operation mode Automatic acknowledgement, retransmission, and timeout protocol engine SPI interface for microcontroller November 2016 DocID029972 Rev 1 1/4 www.st.com For further information contact your local STMicroelectronics sales office Schematic diagram STEVAL-FKI868V1 1 Schematic diagram Figure 1: STEVAL-FKI868V1 circuit schematic GSPG04 11161000SG 2/4 DocID029972 Rev 1 VDD VDD VDD VDD VVDDDDSSMMPP SS VDDVCOT X VDDR XDIG VDDANAS YNTH C1 C 100p 040 2 C3 C2 C5 C7 C4 C8 C6 C 150 n 040 2 C33 C 100p 040 2 C 470 n 040 2 C 100p 040 2 C 100p 040 2 C 470 n 040 2 C 470 n 040 2 3V3 R1 R2 R 100k 040 2 R 100k 040 2 U1 CN1 nS 1 8 nS Vcc SDO 2 7 10 Q nHOL D 3 6 SCL K C9 9 nW C 4 5 SDI C 100 n 040 2 R19 NM 8 Vss D VSMPS 2 7 R6 NM C 470 n 040 2 C10 M9564 0 6 SCL K R4 5 0 SDO R3 4 SDI R 100k 040 2 3 0 CSN R5 2 NM R9 1 nS C 100p 040 2 C11 R7 0 CON1 0 C12 U2 C 150 n 040 2 C 1 u 060 3 Vsmps e xt C TBD 040 2 C13 C32 L2 VDDSMP S 1 18 SCL K L1 CN2 VDDSMP S SCL K 2 17 SDI L3 L TBD 040 2 SMPS 1 SDI C14 C TBD 040 2 R10 0 3 16 SDO L TBD 040 2 L 10U 080 5 8 SDN SMPS 2 SDO R20 NM 4 15VDDR XDIG C16 7 R21 XOU T VDDR XDIG C15 5 14 Y1 L4 6 RF IN/OU T 0 ohm XIN RXP SD N 6 13 C TBD 040 2 5 L TBD 040 2 SDN RXN R11 0 C TBD 040 2 4 SCL K J1 3 VSMPS 2 S2-LP C17 C18 2 C TBD 040 2 C TBD 040 2 1 C21 C19 L5 C20 L TBD 040 2 XTAL VDDANAS YNTH C TBD 040 2 C 12p 040 2 C 12p 040 2 CON 8 R17 NM C22 C23 L6 R22 VDD C 150 n 040 2 C 100p 040 2 L TBD 040 2 CN3 L7 VSMPS 2 1 NM C25 2 Jumpe r2 L TBD 060 3 C34 VD D 3 3V3 C 470p 040 2 C35 4 1 2 C 150 n 040 2 C 100p 040 2 C TBD 040 2 1 2 5 6 7 JP1 8 C24 L9 L10 L8 CON 8 L TBD 040 2 L TBD 040 2 L TBD 040 2 C27 C29 C26 C28 C TBD 040 2 C TBD 040 2 C TBD 040 2 C TBD 040 2 R18 NM CN4 VSMPS 2 VRS YNTH R12 0 1 GP IO0 C30 C31 2 CSN C 100p 040 2 3 R14 0 GP IO1 C 470 n 040 2 R13 0 4 GP IO2 5 R15 0 6 GP IO3 R16 0 CON 6 C 4 .7U 060 3 7 24 VDDANASYNT H VRD IG VRSYNT H 8 23 GP IO3 VRSYNT H GP IO3 9 22 GP IO2 VREFVC O GP IO2 VDDVCOT X 10 21 GP IO1 VDDVCOT X GP IO1 11 20 GP IO0 TX GP IO0 12 19 CSN VRR F CSN 25 GN D