STHVDAC-256MTG Antenna tuning circuit with turbo and glide Datasheet - production data Description The ST high voltage BST capacitor controller STHVDAC-256MTG is a high voltage digital to analog converter (DAC), specifically designed to control and meet the wide tuning bias voltage requirement of the BST tunable capacitors. It provides 6 independent high voltage outputs, thus having the capability to control 6 different capacitors. It is fully controlled through an RFFE serial interface. /HDG IUHH )OLS &KLS BST capacitors are tunable capacitors intended EXPSV for use in mobile phone application and dedicated to RF tunable application. These tunable capacitors are controlled through a bias voltage Features ranging from 0 to 24 V. The implementation of Dedicated controller to bias BST tunable BST tunable capacitor in mobile phones enables capacitors significant improvement in term of radiated performance, making the performance almost Operation compliant with cellular systems insensitive to external environment. requirements Turbo and glide modes for optimal system Figure 1. Pin configuration performance Integrated boost converter with 6 programmable outputs (from 0 to 24 V) 5%, 6 ) Low power consumption MIPI RFFE serial interface 1,8 V ( ,1 9 7(67 % Available in WLCSP for stand-alone or SiP module integration 1& *1 5() / , 6 & Applications &/. / , 6 & *1 * , Cellular antenna tunable matching network in multi-band GSM/WCDMA/LTE handsets 7 2 % ( Compatible for open loop antenna tuner application Benefits RF tunable passive implementation in mobile phones to optimize the radiated performance. November 2015 DocID028369 Rev 1 1/27 This is information on a product in full production. www.st.com 287 287 9, 287 6( 287 6( 287 287 3:5 *1 9+9Electrical characteristics STHVDAC-256MTG 1 Electrical characteristics Table 1. Absolute maximum ratings (limiting value) Symbol Parameter Rating Unit AV Analog supply voltage -0.3 to +5.5 V DD V Digital supply voltage -0.3 to +3.3 V I/O V Input voltage logic lines (DATA, CLK, SEL ID0, SEL ID1) -0.5 to V + 0.5 V LOG I/O V Human body model, JESD22-A114-B, All I/O 2 kV ESD (HBM) T Storage temperature -55 to +150 C stg T Maximum junction temperature 150 C j Table 2. Recommended operating conditions Rating Symbol Parameter Unit min. typ. max. T Operating ambient temperature -30 - +85 C AMB OP AV Analog supply voltage 2.3 - 5 V DD V Digital supply voltage 1.65 - 1.95 V I/O VIH Input voltage logic level High (DATA, CLK, SEL ID0, SEL ID1) 0.7*V -V + 0.3 V I/O I/O VIL Input voltage logic level Low (DATA, CLK, SEL ID0, SEL ID1) -0.3 - 0.3*V V I/O 2/27 DocID028369 Rev 1