STM8AF6223PDU STMicroelectronics

STM8AF6213/13A STM8AF6223/23A STM8AF6226 Automotive 8-bit MCU, with up to 8-Kbyte Flash memory, data EEPROM, 10-bit ADC, timers, LIN, SPI, IC, 3 to 5.5 V Datasheet - production data Features AEC-Q100 qualified Core Max f : 16 MHz CPU LQFP32 7x7 mm VFQFPN32 (5x5 mm) Advanced STM8A core with Harvard TSSOP20 (6.4x4.4 mm) architecture and 3-stage pipeline I/Os Extended instruction set Up to 28 I/Os on a 32-pin package Memories including 21 high sink outputs Program memory: 4 to 8 Kbyte Flash Highly robust I/O design, immune against program data retention 20 years at 55 C current injection after 1 kcycle Communication interfaces Data memory: 640 byte true data LINUART LIN 2.2 compliant, master/slave EEPROM endurance 300 kcycle modes with automatic resynchronization RAM: 1 Kbyte SPI interface up to 8 Mbit/s or f /2 MASTER Clock management 2 I C interface up to 400 Kbit/s Low-power crystal resonator oscillator with Analog to digital converter (ADC) external clock input 10-bit, 1 LSB ADC with up to 7 muxed Internal, user-trimmable 16 MHz RC and channels + 1 internal channel, scan mode low-power 128 kHz RC oscillators and analog watchdog Clock security system with clock monitor Internal reference voltage measurement Reset and supply management Operating temperature up to 150 C Wait/auto-wakeup/Halt low-power modes with user definable clock gating Low-consumption power-on and power- down reset Interrupt management Nested interrupt controller with 32 interrupts Up to 28 external interrupts on 7 vectors Timers Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead- time insertion and flexible synchronization 16-bit general purpose timer with 3 CAPCOM channels each (IC, OC, PWM) 8-bit AR basic timer with 8-bit prescaler Auto-wakeup timer Window and independent watchdog timers April 2020 DS9884 Rev 9 1/112 This is information on a product in full production. www.st.comContents STM8AF6213/13A/23/23A/26 Contents 1 Introduction 9 2 Description 10 3 Block diagram . 11 4 Product overview 12 4.1 Central processing unit (CPU) . 12 4.1.1 Architecture and registers . 12 4.1.2 Addressing . 12 4.1.3 Instruction set 12 4.2 Single wire interface module (SWIM) and debug module (DM) 13 4.2.1 SWIM . 13 4.2.2 Debug module 13 4.3 Interrupt controller 13 4.4 Flash program and data EEPROM memory . 13 4.4.1 Write protection (WP) 13 4.4.2 Read-out protection (ROP) 14 4.5 Clock controller . 15 4.5.1 Features . 15 4.6 Power management . 16 4.7 Watchdog timers . 16 4.8 Auto wakeup counter 17 4.9 Beeper . 17 4.10 TIM1 - 16-bit advanced control timer 17 4.11 TIM5 - 16-bit general purpose timer . 18 4.12 TIM6 - 8-bit basic timer . 18 4.13 Analog-to-digital converter (ADC1) . 19 4.14 Communication interfaces 19 4.14.1 LINUART 20 4.14.2 Serial peripheral interface (SPI) . 21 2 4.14.3 Inter integrated circuit (I C) interface . 21 2/112 DS9884 Rev 9