STM8S007C8 Value line, 24 MHz STM8S 8-bit MCU, 64 Kbytes Flash, true data EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, IC Datasheet - production data Features Core Max f : up to 24 MHz, 0 wait states CPU f 16 MHz CPU LQFP48 7 x 7mm Advanced STM8 core with Harvard architecture and 3-stage pipeline Communications interfaces Extended instruction set UART with clock output for synchronous Max 20 MIPS 24 MHz operation - LIN master mode UART with LIN 2.1 compliant, master/slave Memories modes and automatic resynchronization Program: 64 Kbytes Flash data retention SPI interface up to 10 Mbit/s 20 years at 55 C after 100 cycles 2 I C interface up to 400 Kbit/s Data: 128 bytes true data EEPROM endurance 100 kcycles 10-bit ADC with up to 16 channels RAM: 6 Kbytes I/Os Clock, reset and supply management 38 I/Os including 16 high sink outputs 2.95 to 5.5 V operating voltage Highly robust I/O design, immune against current injection Low power crystal resonator oscillator Development support External clock input Single wire interface module (SWIM) and Internal, user-trimmable 16 MHz RC debug module (DM) Internal low power 128 kHz RC Clock security system with clock monitor Wait, active-halt, & halt low power modes Peripheral clocks switched off individually Permanently active, low consumption power-on and power-down reset Interrupt management Nested interrupt controller with 32 interrupts Up to 37 external interrupts on 6 vectors Timers 2x 16-bit general purpose timers, with 2+3 CAPCOM channels (IC, OC or PWM) Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead- time insertion and flexible synchronization 8-bit basic timer with 8-bit prescaler Auto wakeup timer Window watchdog, independent watchdog October 2018 DS8633 Rev 6 1/93 This is information on a product in full production. www.st.comContents STM8S007C8 Contents 1 Introduction 8 2 Description . 9 3 Block diagram . 10 4 Product overview 11 4.1 Central processing unit STM8 11 4.2 Single wire interface module (SWIM) and debug module (DM) 12 4.3 Interrupt controller 12 4.4 Flash program memory and data EEPROM . 12 4.5 Clock controller . 14 4.6 Power management . 15 4.7 Watchdog timers . 15 4.8 Auto wakeup counter 16 4.9 Beeper . 16 4.10 TIM1 - 16-bit advanced control timer 16 4.11 TIM2, TIM3 - 16-bit general purpose timers . 16 4.12 TIM4 - 8-bit basic timer . 17 4.13 Analog-to-digital converter (ADC2) . 17 4.14 Communication interfaces 17 4.14.1 UART1 18 4.14.2 UART3 18 4.14.3 SPI . 19 2 4.14.4 I C . 20 5 Pinouts and pin descriptions . 21 5.1 Alternate function remapping 25 6 Memory and register map 26 6.1 Memory map 26 6.2 Register map 27 2/93 DS8633 Rev 6