TSM150NB04LDCR Taiwan Semiconductor Dual N-Channel Power MOSFET 40V, 37A, 15m FEATURES KEY PERFORMANCE PARAMETERS Low R to minimize conductive losses PARAMETER VALUE UNIT DS(ON) Logic level V 40 V DS Low gate charge for fast power switching V = 10V 15 GS 100% UIS and R tested g R (max) m DS(on) V = 4.5V 19 RoHS Compliant GS Halogen-free according to IEC 61249-2-21 Q 9 nC g APPLICATIONS BLDC Motor Control Battery Power Management DC-DC Converter Secondary Synchronous Rectification PDFN56 Dual Note: MSL 1 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V 40 V DS Gate-Source Voltage V 20 V GS T = 25C 37 C (Note 1) Continuous Drain Current I A D T = 25C 8 A Pulsed Drain Current I 148 A DM (Note 2) Single Pulse Avalanche Current I 14 A AS (Note 2) Single Pulse Avalanche Energy E 29 mJ AS T = 25C 40 C Total Power Dissipation P W D T = 125C 8 C T = 25C 2 A Total Power Dissipation P W D T = 125C 0.4 A Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG THERMAL PERFORMANCE PARAMETER SYMBOL MAXIMUM UNIT Junction to Case Thermal Resistance R 3.1 C/W JC Junction to Ambient Thermal Resistance R 61 C/W JA Thermal Performance Note: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case- JA thermal reference is defined at the solder mounting surface of the drain pins. R is guaranteed by design while R is JC CA 2 determined by the users board design. The R limit presented here is based on mounting on a 1 in pad of 2 oz copper. JA 1 Version: A2001 TSM150NB04LDCR Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV 40 -- -- V GS D DSS Gate Threshold Voltage V = V , I = 250A V 1 1.7 2.5 GS DS D GS(TH) V Gate-Source Leakage Current V = 20V, V = 0V I -- -- 100 nA GS DS GSS V = 0V, V = 40V GS DS -- -- 1 Drain-Source Leakage Current I A V = 0V, V = 40V DSS GS DS -- -- 100 T = 125C J V = 10V, I = 8A -- 10 15 Drain-Source On-State Resistance GS D R m DS(on) (Note 3) V = 4.5V, I = 7A -- 14 19 GS D (Note 3) V = 10V, I = 8A Forward Transconductance g -- 32 -- S DS D fs (Note 4) Dynamic V = 10V, V = 20V, GS DS Total Gate Charge Q -- 18 -- g I = 8A D Total Gate Charge Q -- 9 -- g nC V = 4.5V, V = 20V, GS DS Gate-Source Charge Q -- 3 -- gs I = 7A D Gate-Drain Charge Q -- 5 -- gd Input Capacitance C -- 966 -- iss V = 0V, V = 20V, GS DS Output Capacitance C -- 108 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C -- 64 -- rss Gate Resistance f = 1.0MHz R 0.6 1.9 3.8 g (Note 4) Switching Turn-On Delay Time t -- 1 -- d(on) Turn-On Rise Time t -- 19 -- r V = 10V, V = 20V, GS DS ns Turn-Off Delay Time I = 8A, R = 2 t -- 10 -- D G d(off) Turn-Off Fall Time t -- 12 -- f Source-Drain Diode (Note 3) Forward Voltage V -- -- 1.2 V V = 0V, I = 8A SD GS S Reverse Recovery Time t -- 12 -- ns rr I = 8A, S Reverse Recovery Charge Q -- 5 -- nC dI/dt = 100A/s rr Notes: 1. Silicon limited current only. 2. L = 0.3mH, V = 10V, V = 25V, R = 25, I = 14A, Starting T = 25C GS DD G AS J 3. Pulse test: Pulse Width 300s, duty cycle 2%. 4. Switching time is essentially independent of operating temperature. ORDERING INFORMATION ORDERING CODE PACKAGE PACKING TSM150NB04LDCR RLG PDFN56 Dual 2,500pcs / 13 Reel 2 Version: A2001