74HC132D Toshiba

74HC132D CMOS Digital Integrated Circuits Silicon Monolithic 74HC132D74HC132D74HC132D74HC132D 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Quad 2-Input Schmitt NAND Gate 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74HC132D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the 74HC00D but the inputs have 25% VCC hysteresis and with its schmitt trigger inputs, the 74HC132D can be used as a line receiver for slow input signals. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) High speed: t = 11 ns (typ.) at V = 5 V pd CC (2) Low power dissipation: I = 1.0 A (max) at T = 25 CC a (3) High noise immunity: V = 1.1 V (typ.) at V = 4.5 V H CC (4) Balanced propagation delays: t t PLH PHL (5) Wide operating voltage range: V = 2.0 to 6.0 V CC(opr) 4. 4. 4. 4. PackagingPackagingPackagingPackaging SOIC14 Start of commercial production 2016-04 2016 Toshiba Corporation 2016-05-25 1 Rev.2.074HC132D 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 7. 7. IEC Logic SymbolIEC Logic Symbol 7. 7. IEC Logic SymbolIEC Logic Symbol 2016 Toshiba Corporation 2016-05-25 2 Rev.2.0