TBD62789APG Toshiba

TBD62789APG TOSHIBA BiCD Integrated Circuit Silicon Monolithic TBD62789APG 8-ch source type DMOS transistor array including D type flip-flop TBD62789APG is a DMOS transistor array with 8 circuits including D type flip flop logic circuits. Please be careful about thermal conditions during use. Features Built-in 8 circuits High output voltage : V = 50 V (max) OUT High output current : I = 500 mA/ch (max) OUT Package : DIP20-P-300-2.54A DIP20-P-300-2.54A Weight: 1.4 g (typ.) Pin Assignment (top view) VDD Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 GND /CLR D1 D2 D3 D4 D5 D6 D7 D8 CLK 2017-04-26 1 2017 Toshiba Corporation TBD62789APG Pin Description Pin No. Pin name Function 1 /CLR Input pin of clear signals 2 D1 Input pin of data signals 3 D2 Input pin of data signals 4 D3 Input pin of data signals 5 D4 Input pin of data signals Input pin of data signals 6 D5 7 D6 Input pin of data signals 8 D7 Input pin of data signals 9 D8 Input pin of data signals 10 CLK Input pin of clock signals 11 GND Ground pin 12 Y8 Output pin 13 Y7 Output pin Output pin 14 Y6 15 Y5 Output pin 16 Y4 Output pin 17 Y3 Output pin Output pin 18 Y2 19 Y1 Output pin 20 VDD Power supply pin Block Diagram Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Clamp Clamp Clamp Clamp Clamp Clamp Clamp Clamp diode diode diode diode diode diode diode diode VDD D D D D D D D D Q Q Q Q Q Q Q Q CK CK CK CK CK CK CK CK CLK 100k R R R R R R R R (typ.) /CLR 100k 100k 100k 100k 100k 100k 100k 100k 100k (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) D1 D2 D3 D4 D5 D6 D7 D8 GND Basic circuit may be omitted partially or simplified for explanatory purpose. Function Table INPUT OUTPUT: Y /CLR CLK D L X X Z (OFF) H L Z (OFF) H H H (ON) H L X Y0 H X Y0 : Change fromL toH : Change fromH toL H: High level Z: High impedance (OFF) X: Dont care Y0: Y level immediately before determining the input condition shown in the table 2017-04-26 2