TC4071BP(N,F) Toshiba

TC4071BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BP,TC4071BF TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs TC4071BP respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation characteristic has been improved and the variation of propagation time caused by increase of load capacity is kept minimum. Pin Assignment TC4071BF Weight DIP14-P-300-2.54 : 0.96 g (typ.) Logic Diagram SOP14-P-300-1.27A : 0.18 g (typ.) 1/4 TC4071B 1 2012-02-29 TC4071BP/BF Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit DC supply voltage V V 0.5 to V + 20 V DD SS SS Input voltage V V 0.5 to V + 0.5 V IN SS DD Output voltage V V 0.5 to V + 0.5 V OUT SS DD DC input current I 10 mA IN Power dissipation P 300 (DIP)/180 (SOIC) mW D Operating temperature range T 40 to 85 C opr Storage temperature range T 65 to 150 C stg Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (V = 0 V) (Note) SS Characteristics Symbol Test Condition Min Typ. MaxUnit DC supply voltage V 3 18 V DD Input voltage V 0 V V IN DD Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either V or V . DD SS 2 2012-02-29