TC74ACT14P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT14P, TC74ACT14F, TC74ACT14FT Hex Schmitt Inverter The TC74ACT14 is an advanced high speed CMOS SCHMITT TC74ACT14P INVERTER fabricated with silicon gate and double-layer metal 2 wiring C MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. Pin configuration and function are the same as the TC74ACT04 but the inputs have hysteresis and with its schmitt TC74ACT14F trigger function, the TC74ACT14 can be used as a line receivers which will receive slow input signals. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: t = 6.5 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC TC74ACT14FT Compatible with TTL outputs: V = 0.8 V (max) IL V = 2.0 V (min) IH Symmetrical output impedance: I = I = 24 mA (min) OH OL Capability of driving 50 transmission lines. Balanced propagation delays: t t pLH pHL Wide operating voltage range: V = 2 V to 5.5 V CC (opr) Pin and function compatible with 74F14 Weight DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) TSSOP14-P-0044-0.65A : 0.06 g (typ.) Start of commercial production 1989-11 1 2014-03-01 TC74ACT14P/F/FT Pin Assignment IEC Logic Symbol (1) (2) 1A 1Y 1A 1 14 V CC (3) (4) 2A 2Y (5) (6) 3A 3Y 1Y 2 13 6A (9) (8) 4A 4Y (11) (10) 2A 12 6Y 3 5A 5Y (13) (12) 6A 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y (top view) Truth Table A Y L H H L System Diagram, Waveform A Y V H V P V (A) IN V N V (Y) OUT Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range V 0.5 to 7.0 V CC DC input voltage V 0.5 to V + 0.5 V IN CC DC output voltage V 0.5 to V + 0.5 V OUT CC Input diode current I 20 mA IK Output diode current I 50 mA OK DC output current I 50 mA OUT DC V /ground current I 150 mA CC CC Power dissipation P 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW D Storage temperature T 65 to 150 C stg Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = 40C to 65C. From Ta = 65C to 85C a derating factor of 10 mW/C should be applied up to 300 mW. 2 2014-03-01