TC74HC4028AF(F) Toshiba

TC74HC4028AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4028AP, TC74HC4028AF BCD-to-Decimal Decoder The TC74HC4028A is a high speed CMOS BCD-to-DECIMAL 2 TC74HC4028AP DECODER fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. A BCD code applied to the four inputs (A-D) sets a high level at one of ten decoded outputs. A illegal BCD code such as eleven thru fifteen sets all outputs low. This device can be used as 3-to-8 LINE DECODER when input D is held high. This device is useful for code conversion, address decoding, memory selection, multiplexing, or readout decoding. All inputs are equipped with protection circuits against static TC74HC4028AF discharge or transient excess voltage. Features High speed: t = 18 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Output drive capability: 10 LSTTL loads Symmetrical output impedance: I = I = 4 mA (min) OH OL Weight Balanced propagation delays: t t pLH pHL DIP16-P-300-2.54A : 1.00 g (typ.) Wide operating voltage range: V (opr) = 2 to 6 V CC SOP16-P-300-1.27A : 0.18 g (typ.) Pin and function compatible with 4028B. Pin Assignment Start of commercial production 1988-11 1 2014-03-01 TC74HC4028AP/AF IEC Logic Symbol Truth Table Inputs Outputs Selected Output D C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 L L L L H L L L L L L L L L Y0 L L L H L H L L L L L L L L Y1 L L H L L L H L L L L L L L Y2 L L H H L L L H L L L L L L Y3 L H L L L L L L H L L L L L Y4 L H L H L L L L L H L L L L Y5 L H H L L L L L L L H L L L Y6 L H H H L L L L L L L H L L Y7 H L L L L L L L L L L L H L Y8 H L L H L L L L L L L L L H Y9 H X H X L L L L L L L L L L None H H X X L L L L L L L L L L None X: Dont care System Diagram 2 2014-03-01