TC74HC4050AP(F) Toshiba

TC74HC4049AP,TC74HC4050AP CMOS Digital Integrated Circuits Silicon Monolithic TC74HC4049AP,TC74HC4050AP 1. Functional Description Hex Buffer TC74HC4049AP: HEX BUFFER/CONVERTER (INVERTING) TC74HC4050AP: HEX BUFFER/CONVERTER 2. General The TC74HC4049AP and TC74HC4050AP are high speed CMOS HEX BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The TC74HC4049AP is an inverting buffer, while the TC74HC4050AP is a non-inverting buffer. The internal circuits are composed of 3-stages (TC74HC4049AP) or 2-stages (TC74HC4050AP) of inverter, which provided high noise immunity and stable output. Input protection circuits are different from those of other high speed CMOS IC s. They eliminate the diodes on the V side thus providing of logic-level conversion from high-level voltages up to 15 V to low-level voltages. CC They are useful for battery back up circuits, because input voltage can be applied on IC s which are not biased by V . CC 3. Features (1) High speed: t = 9 ns (typ.) at V = 5.0 V pd CC (2) Low power dissipation: I = 1.0 A (max) at T = 25 CC a (3) High noise immunity: V = V = 28 % V (min) NIH NIL CC (4) Symmetrical Output impedance: I = I = 6 mA (min) OH OL (5) Balanced propagation delays: t t PLH PHL (6) Wide operating voltage range: V = 2.0 V to 6.0 V CC(opr) (7) Power-down protection is provided on all inputs. 4. Packaging DIP16 Start of commercial production 1986-05 2020-2021 2021-01-07 1 Toshiba Electronic Devices & Storage Corporation Rev.1.0TC74HC4049AP,TC74HC4050AP 5. Pin Assignment TC74HC4049AP TC74HC4050AP 6. Marking TC74HC4049AP TC74HC4050AP 7. IEC Logic Symbol TC74HC4049AP TC74HC4050AP 8. Truth Table Output Y Output Y Input A (TC74HC4049AP) (TC74HC4050AP) L H L H L H 2020-2021 2021-01-07 2 Toshiba Electronic Devices & Storage Corporation Rev.1.0