TC74HCT00AF(F) Toshiba

TC74HCT00AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HCT00AP,TC74HCT00AF,TC74HCT00AFN Quad 2-Input NAND Gate Note: xxxFN (JEDEC SOP) is not available in Japan. The TC74HCT00A is a high speed CMOS 2-INPUT NAND 2 TC74HCT00AP GATE fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HCT00AF Features High speed: t = 10 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 1 A (max) at Ta = 25C CC Compatible with TTL outputs: V = 2 V (min) IH V = 0.8 V (max) IL Wide interfacing ability: LSTTL, NMOS, CMOS Output drive capability: 10 LSTTL loads TC74HCT00AFN Symmetrical output impedance: I = I = 4 mA (min) OH OL Balanced propagation delays: t t pLH pHL Pin and function compatible with 74LS00 Pin Assignment Weight DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) SOL14-P-150-1.27 : 0.12 g (typ.) 1 2007-10-01 TC74HCT00AP/AF/AFN IEC Logic Symbol Truth Table A B Y L L H L H H H L H H H L Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range V 0.5~7 V CC DC input voltage V 0.5~V + 0.5 V IN CC DC output voltage V 0.5~V + 0.5 V OUT CC Input diode current I 20 mA IK Output diode current I 20 mA OK DC output current I 25 mA OUT DC V /ground current I 50 mA CC CC Power dissipation P 500 (DIP) (Note 2)/180 (SOP) mW D Storage temperature T 65~150 C stg Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = 40 to 65C. From Ta = 65 to 85C a derating factor of 10 mW/C shall be applied until 300 mW. Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage V 4.5~5.5 V CC Input voltage V 0~V V IN CC Output voltage V 0~V V OUT CC Operating temperature T 40~85 C opr Input rise and fall time t , t 0~500 ns r f Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 2 2007-10-01