IL410, IL4108 Vishay Semiconductors Optocoupler, Phototriac Output, Zero Crossing, High dV/dt, Low Input Current FEATURES A 1 6 MT2 High input sensitivity C 5 2 NC I = 2 mA, PF = 1.0 FT ZCC* NC 3 4 MT1 I = 5 mA, PF 1.0 FT *Zero crossing circuit i179030 4 21842-1 V DE 300 mA on-state current DESCRIPTION Zero voltage crossing detector The IL410 and IL4108 consists of a GaAs IRLED optically 600 V, 800 V blocking voltage coupled to a photosensitive zero crossing TRIAC network. The TRIAC consists of two inverse parallel connected High static dV/dt 10 kV/s monolithic SCRs. These three semiconductors are Very low leakage < 10 A assembled in a six pin dual in-line package. High input sensitivity is achieved by using an emitter Isolation test voltage 5300 V RMS follower phototransistor and a cascaded SCR predriver Small 6 pin DIP package resulting in an LED trigger current of less than 2 mA (DC). The use of a proprietary dV/dt clamp results in a static dV/dt Compliant to RoHS Directive 2002/95/EC and in of greater than 10 kV/ms. This clamp circuit has a MOSFET accordance to WEEE 2002/96/EC that is enhanced when high dV/dt spikes occur between MT1 and MT2 of the TRIAC. When conducting, the FET clamps the base of the phototransistor, disabling the first APPLICATIONS stage SCR predriver. Solid-state relays The zero cross line voltage detection circuit consists of two enhancement MOSFETS and a photodiode. The inhibit Industrial controls voltage of the network is determined by the enhancement Office equipment voltage of the N-channel FET. The P-channel FET is enabled by a photocurrent source that permits the FET to conduct Consumer appliances the main voltage to gate on the N-channel FET. Once the main voltage can enable the N-channel, it clamps the base AGENCY APPROVALS of the phototransistor, disabling the first stage SCR predriver. UL1577, file no. E52744 system code H, double protection The 600 V, 800 V blocking voltage permits control of off-line CSA 93751 voltages up to 240 V , with a safety factor of more than AC two, and is sufficient for as much as 380 V . AC DIN EN 60747-5-2 (VDE 0884)/DIN EN 60747-5-5 The IL410, IL4108 isolates low-voltage logic from 120 V , AC (pending), available with option 1 240 V , and 380 V lines to control resistive, inductive, or AC AC capacitive loads including motors, solenoids, high current thyristors or TRIAC and relays. ORDERING INFORMATION DIP- I L 41 0 - X 0 T 7.62 mm Option 6 Option 7 PART NUMBER PACKAGE OPTION TAPE AND REEL 10.16 mm > 0.7 mm Option 8 Option 9 9.27 mm > 0.1 mm AGENCY CERTIFIED/PACKAGE BLOCKING VOLTAGE V (V) DRM UL 600 800 DIP-6 IL410 IL4108 DIP-6, 400 mil, option 6 IL410-X006 IL4108-X006 (1) (1) SMD-6, option 7 IL410-X007T IL4108-X007T SMD-6, option 8 IL410-X008T - (1) (1) SMD-6, option 9 IL410-X009T IL4108-X009T VDE, UL 600 800 DIP-6 IL410-X001 IL4108-X001 DIP-6, 400 mil, option 6 IL410-X016 IL4108-X016 SMD-6, option 7 IL410-X017 IL4108-X017 (1) SMD-6, option 9 IL410-X019T - Note (1) Also available in tubes, do not put T on the end. Document Number: 83627 For technical questions, contact: optocoupleranswers vishay.com www.vishay.com Rev. 2.0, 29-Mar-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 IL410, IL4108 Optocoupler, Phototriac Output, Zero Crossing, Vishay Semiconductors High dV/dt, Low Input Current ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise specified) amb PARAMETER TEST CONDITION PART SYMBOL VALUE UNIT INPUT Reverse voltage V 6V R Forward current I 60 mA F Surge current I 2.5 A FSM Power dissipation P 100 mW diss Derate from 25 C 1.33 mW/C OUTPUT IL410 V 600 V DRM Peak off-state voltage IL4108 V 800 V DRM RMS on-state current I 300 mA TM Single cycle surge current 3A Total power dissipation P 500 mW diss Derate from 25 C 6.6 mW/C COUPLER Isolation test voltage t = 1 s V 5300 V ISO RMS between emitter and detector Pollution degree (DIN VDE 0109) 2 Creepage distance 7mm Clearance distance 7mm Comparative tracking index per DIN IEC112/VDE 0303 part 1, group IIIa CTI 175 per DIN VDE 6110 12 V = 500 V, T = 25 C R 10 IO amb IO Isolation resistance 11 V = 500 V, T = 100 C R 10 IO amb IO Storage temperature range T - 55 to + 150 C stg Ambient temperature T - 55 to + 100 C amb max. 10 s dip soldering (1) Soldering temperature T 260 C sld 0.5 mm from case bottom Notes Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute maximum ratings for extended periods of the time can adversely affect reliability. (1) Refer to reflow profile for soldering conditions for surface mounted devices (SMD). Refer to wave profile for soldering conditions for through hole devices (DIP). www.vishay.com For technical questions, contact: optocoupleranswers vishay.com Document Number: 83627 2 Rev. 2.0, 29-Mar-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000