LEE-128G032-1 Vishay Dale LED Display Modules 128 x 32 Graphics Display with Drive Electronics and + 5 V HC CMOS Level Video Interface Orange 0603 Chip LEDs, Normal Brightness, RoHS Compliant FEATURES LED replacement for the popular APD-128G032 plasma display module + 5 V HC CMOS level video interface Large characters Highly visible for long distance viewing > 30:1 contrast ratio Brilliant neon orange color Slim profile The LEE-128G032-1 is an LED replacement for the popular Reduced power and brightness version APD-128G032 plasma display module. It is designed to Compliant to RoHS directive 2002/95/EC offer high brightness and superior viewing characteristics in a slim package. This display is ideal for low to medium level ELECTRICAL SPECIFICATIONS information content and is ideal for applications such as Voltage(s) Required: + 5 V (V ) DC CC arcade games, process control, POS terminals, medical Power Required (Fully Lit): Typical = 5.5 W equipment, message centers and ATM machines. Maximum = 6.5 W The LEE-128G032-1 LED display offers high contrast, wide viewing angle, and long distance readability. It emits a OPTICAL SPECIFICATIONS brilliant orange color which catches the attention of the Viewing Area: 12.75 323.8 mm W x 3.15 80.01 mm L viewer, but is yet comfortable to the eye. Character Size (5 x 7): 0.65 16.51 mm H x 0.45 11.43 mm W The LEE-128G032-1 LED display has a video type interface Pixel Size: 0.063 1.6 mm H x 0.031 0.8 mm W and is driven in a standard row/column refresh method. Pixel Pitch: 0.100 2.54 mm Pixel data is clocked for a row, and rows are scanned Luminance: 100 ft-L minimum sequentially. Signals are presented for serial data, dot clock, column latch, row data, row clock and display enable. The Color: Neon orange serial data is entered with the dot clock up to frequencies as Viewing Angle: > 150 high as 8 MHz. After a row of 128 pixels is clocked in, the column latch signal is toggled and the data is latched. At the ENVIRONMENTAL SPECIFICATIONS time the data is latched, the display is briefly disabled using Operating Temperature: - 40 C to + 85 C the display enable signal, then the row pointer is advanced Storage Temperature: - 40 C to + 85 C with the row clock signal. Once each frame the row data Relative Operating Humidity: To 95 % non-condensing must be asserted to synchronize the column serial data with the beginning row. The recommended scanning frequency Mechanical Shock: 30 G is approximately 70 Hz, but may be as high as 200 Hz. Vibration: 3 G Operating Altitude: 10 000 ft (1) STANDARD ELECTRICAL SPECIFICATIONS DIMENSIONS in inches millimeters DESCRIPTION SYMBOL MIN. TYP. MAX. UNITS 0.150 Mounting Holes (6 x) 128 x 32 Full LED Field Logic and LED V + 4.5 + 5.0 + 5.5 V CC DC 12.70 1.025 Drive Voltage 14.50 0.150 Logic and LED Drive Current I -1.1 1.3 A CC DC (Fully Lit) 4.625 Logic 1 Input V 0.7 V -- V ih CC DC Logic 0 Input V -- 0.3 V V il CC DC 0.400 0.150 Max. Note 7.25 (1) Recommended operating voltages, all maximums are absolute 13.775 0.625 0.70 Max. 14.80 maximum Component Height Pin 1 of J1 Pin 1 of J2 Pin 1 of J3 Document Number: 37084 For technical questions, contact: displays vishay.com www.vishay.com Revision: 14-Jan-09 1 0.912 3.10 0.487 4.075 4.925 LEE-128G032-1 LED Display Modules Vishay Dale PIN DESCRIPTION LOGIC AND DATA TIMING J1 - POWER CONNECTOR t 4 Molex 26-48-1082 or equivalent. Mates with Tyco AMP 3-640428-8, Molex 09-50-3081 housing with 08-50-0106 socket crimp terminals Row Data or equivalent t 2 PIN SIGNAL DESCRIPTION t t 1 3 1 N/C No connection 2 N/C No connection Row Clock 3 KEY Used to key connector 0 1230310 1 4 GND Ground 5 GND Ground 6V Logic and LED drive supply CC 031 2 03101 7 RESERVED No connection 8 N/C No connection Display Enable J2 - DATA CONNECTOR Tyco AMP 5103309-2 or equivalent. Mates with Tyco AMP 1658621-2 or equivalent PIN DESCRIPTION PIN DESCRIPTION 1 Display enable 2 Ground 3 Row data 4 Ground Row Clock 5 Row clock 6 Ground 7 Column latch 8 Ground 9 Dot clock 10 Ground 11 Serial data 12 Ground Column Latch 13 No connection 14 Ground J3 - POWER CONNECTOR Tyco AMP 641737-1 or equivalent. Mates with Tyco AMP 1-480424-0 housing, 60617-4 socket crimp terminals PIN SIGNAL DESCRIPTION Display Enable 1 RESERVED No connection 2 GND Ground 3 GND Ground st 1 bit of row will appear in left most column 4V Logic and LED drive supply CC Serial Data 0 1 2 126 127 INTERFACE SIGNAL DESCRIPTION Dot clock - This signal enters the serial data on each low to t 5 high transition. A total of 128 dot clock transitions must be present for each line of column/anode data. Dot Clock Serial data - This signal presents the pixel data in positive t Positive edge x 128 t 6 7 logic format. A logic one represents a lit pixel and a logic zero represents an extinguished pixel. Data is entered from PARAMETER MIN. TYP. MAX. UNITS right to left. The first pixel data entered will represent the left most pixel in the row. t 100 - - ns 1 Column latch - This signal latches the pixel data into the t 5- - s 2 driver outputs. When the column latch signal goes to logic one the data entered previously will fall through to the driver t 1- - s 3 outputs. When the signal returns to a logic zero the data is t - 70 200 Hz 4 latched and the shift register is now ready to accept the next row of data. Must be held low while entering new serial data. t 25 - - ns 5 Display enable - This signal enables the output drivers. t 75 - - ns 6 Using a duty cycle control, this signal may also be used for intensity control. The display enable must be at logic zero t 75 - - ns 7 before the column latch signal transitions. To avoid display blurring, the row clock signal should also transition while display enable is a logic zero. ORDERING INFORMATION Row data - This signal is the first line marker for the scan. DESCRIPTION PART NUMBER This input should be held high to correspond to the first row of pixel data. Display, Driver Electronics and LEE-128G032-1 Row clock - This signal clocks row data on the falling edge. + 5 V HC CMOS Interface The row clock signal is repetitive and must be present for J2 Data Connector Kit proper scanning of the display module. 280105-08 (2 pcs. recommended) The LEE-128G032-1 has an unique input protection circuit that assures the column drivers stay blanked on power up. J1 Power Connector Kit 280108-14 The protection circuit unblanks the column drivers when the J3 Power Connector Kit 280108-15 row clock signal begins (i.e the display begins scanning). www.vishay.com For technical questions, contact: displays vishay.com Document Number: 37084 2 Revision: 14-Jan-09