0.8 mm Si5429DU Vishay Siliconix P-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET V (V) R () Max. I (A) Q (Typ.) DS DS(on) D g Thermally Enhanced PowerPAK a 0.015 at V = - 10 V - 12 GS - 30 20 nC ChipFET Package a 0.022 at V = - 4.5 V - 12 GS - Small Footprint Area, Thin 0.8 mm Profile - Low On-Resistance 100 % R Tested g Material categorization: PowerPAK ChipFET Single For definitions of compliance please see www.vishay.com/doc 99912 1 2 APPLICATIONS D 3 Power Management for Mobile Computing D D - Adaptor Switch 4 D D - Load Switch 8 G - DC/DC Converter D 7 S 6 S S 5 G Marking Code Bottom View BH XXX Ordering Information: Lot Traceability Si5429DU-T1-GE3 (Lead (Pb)-free and Halogen-free) and Date Code Part Code D P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol Limit Unit V Drain-Source Voltage - 30 DS V V Gate-Source Voltage 20 GS a T = 25 C - 12 C a T = 70 C C - 12 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A - 11.8 b, c T = 70 C A A - 9.4 I Pulsed Drain Current (t = 300 s) - 50 DM a T = 25 C - 12 C I Continuous Source-Drain Diode Current S b, c T = 25 C A - 11.86 T = 25 C 31 C T = 70 C 20 C P Maximum Power Dissipation W D b, c T = 25 C A 3.1 b, c T = 70 C A 2 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 5 s R 34 40 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 34 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 90 C/W. Document Number: 63933 For technical support, please contact: pmostechsupport vishay.com www.vishay.com S12-0804-Rev. A, 16-Apr-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000Si5429DU Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = - 250 A - 30 V DS GS D V Temperature Coefficient V /T - 20 DS DS J I = - 250 A mV/C D V Temperature Coefficient V /T 4.4 GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = - 250 A - 1.0 - 2.2 V GS(th) DS GS D Gate-Source Leakage I V = 0 V, V = 20 V 100 nA GSS DS GS V = - 30 V, V = 0 V - 1 DS GS V = - 30 V, V = 0 V, T = 55 C - 5 DS GS J Zero Gate Voltage Drain Current I V = - 3 V, V = 0 V - 0.0001 A DSS DS GS V = - 3 V, V = 0 V, T = 0 C - 0.0001 DS GS J V = - 3 V, V = 0 V, T = 55 C - 0.0001 DS GS J a On-State Drain Current I V - 5 V, V = - 4.5 V - 20 A D(on) DS GS V - 10 V, I = - 7 A 0.0122 0.015 GS D a Drain-Source On-State Resistance R DS(on) V - 4.5 V, I = - 5 A 0.0178 0.022 GS D a Forward Transconductance g V = - 10 V, I = - 7 A 25 S fs DS D b Dynamic Input Capacitance C 2320 iss Output Capacitance C 275V = - 15 V, V = 0 V, f = 1 MHz pF oss DS GS Reverse Transfer Capacitance C 235 rss V = - 15 V, V = - 10 V, I = - 12 A 42 63 DS GS D Total Gate Charge Q g 20 30 nC Gate-Source Charge Q 6.3 = - 15 V, V = - 4.5 V, I = - 12 A V gs DS GS D 6.3 Gate-Drain Charge Q gd f = 1 MHz 0.8 4.2 8.4 Gate Resistance R g 35 70 Turn-on Delay Time t d(on) 2550 Rise Time t V = - 15 V, R = 1.5 r DD L I - 10 A, V = - 4.5 V, R = 1 3160 Turn-Off Delay Time t D GEN g d(off) 10 20 Fall Time t f ns 10 20 Turn-On Delay Time t d(on) 10 20 Rise Time t V = - 15 V, R = 1.5 r DD L I - 10 A, V = - 10 V, R = 1 Turn-Off Delay Time t 4080 D GEN g d(off) 10 20 Fall Time t f Drain-Source Body Diode Characteristics T = 25 C - 12 Continuous Source-Drain Diode Current I S C A 50 Pulse Diode Forward Current I SM I = - 10 A, V = 0 V - 0.83 - 1.2 V Body Diode Voltage V SD S GS Body Diode Reverse Recovery Time t 10 20 ns rr 310 nC Body Diode Reverse Recovery Charge Q rr I = - 10 A, dI/dt = 100 A/s, T = 25 C F J 6 Reverse Recovery Fall Time t a ns 4 Reverse Recovery Rise Time t b Notes: a. Pulse test pulse width 300 s, duty cycle 2 % a. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com For technical support, please contact: pmostechsupport vishay.com Document Number: 63933 2 S12-0804-Rev. A, 16-Apr-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000