SiRA16DP Vishay Siliconix N-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Gen IV Power MOSFET a,g V (V) R ( ) Max. Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.0068 at V = 10 V 16 GS Material categorization: 30 13.2 nC 0.0097at V = 4.5 V 16 For definitions of compliance please see GS www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS D DC/DC Conversion S 5.15 mm 6.15 mm High Current Power Rails in Computing 1 S 2 Load Switching S 3 G Battery Protection 4 G DC/AC Inverters D 8 D 7 D 6 D 5 S Bottom View N-Channel MOSFET Ordering Information: SiRA16DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V Drain-Source Voltage 30 DS V V Gate-Source Voltage + 20, - 16 GS g T = 25 C C 16 g T = 70 C C 16 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 16 b, c T = 70 C A 14.2 A I Pulsed Drain Current (t = 100 s) 70 DM g T = 25 C C 16 I Continuous Source-Drain Diode Current S b, c T = 25 C A 3.5 I Single Pulse Avalanche Current 15 AS L = 0.1 mH Single Pulse Avalanche Energy E 11.25 mJ AS T = 25 C 29.7 C T = 70 C 19 C P Maximum Power Dissipation W D b, c T = 25 C A 3.9 b, c T = 70 C A 25 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R t 10 s 27 32 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 3.5 4.2 thJC Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 70 C/W. g. Package limited. Document Number: 62901 www.vishay.com For technical questions, contact: pmostechsupport vishay.com S13-2078-Rev. A, 30-Sep-13 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiRA16DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 30 V DS GS D V Temperature Coefficient V /T 18 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 5 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 12.3V GS(th) DS GS D I V = 0 V, V = + 20, - 16 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V On-State Drain Current 20 A D(on) DS GS V = 10 V, I = 15 A 0.0056 0.0068 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 10 A 0.0077 0.0097 GS D a g V = 10 V, I = 15 A 60 S Forward Transconductance fs DS D b, d Dynamic C Input Capacitance 2060 iss C Output Capacitance 543 oss V = 15 V, V = 0 V, f = 1 MHz pF DS GS C Reverse Transfer Capacitance 47 rss C /C Ratio 0.023 0.046 rss iss V = 15 V, V = 10 V, I = 10 A 31 47 DS GS D Q Total Gate Charge g 13.2 20 V = 15 V, V = 4.5 V, I = 10 A DS GS D Q Gate-Source Charge 5.7 nC gs Q Gate-Drain Charge 2.2 gd Output Charge Q V = 15 V, V = 0 V 15.4 oss DS GS R Gate Resistance f = 1 MHz 0.4 1.0 1.7 g t Turn-On Delay Time 21 42 d(on) Rise Time t 10 20 r V = 15 V, R = 1.5 DD L I 10 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 19 38 d(off) Fall Time t 816 f ns t Turn-On Delay Time 10 20 d(on) t Rise Time V = 15 V, R = 1.5 10 20 r DD L I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time t 19 38 D GEN g d(off) t Fall Time 816 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 16 S C A I 70 Pulse Diode Forward Current (t = 100 s) SM Body Diode Voltage V I = 5 A 0.78 1.1 V SD S t Body Diode Reverse Recovery Time 28 55 ns rr Q Body Diode Reverse Recovery Charge I = 5 A, dI/dt = 100 A/s, 20 40 nC rr F T = 25 C t Reverse Recovery Fall Time J 14 a ns t Reverse Recovery Rise Time 14 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 62901 For technical questions, contact: pmostechsupport vishay.com 2 S13-2078-Rev. A, 30-Sep-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000