VS-ST180SPbF Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 200 A
FEATURES
Center amplifying gate
International standard case TO-93 (TO-209AB))
Hermetic metal case with ceramic insulator
Compression bonded encapsulation for heavy
duty operations such as severe thermal cycling
TO-93 (TO-209AB)
Designed and qualified for industrial level
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PRIMARY CHARACTERISTICS
TYPICAL APPLICATIONS
I 200 A
T(AV)
V /V 1600 V, 2000 V
DRM RRM DC motor controls
V 1.75 V
TM
Controlled DC power supplies
I 150 mA
GT
AC controllers
T -40 C to +125 C
J
Package TO-93 (TO-209AB)
Circuit configuration Single SCR
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
200 A
I
T(AV)
T 85 C
C
I 314 A
T(RMS)
50 Hz 5000
I A
TSM
60 Hz 5230
50 Hz 125
2 2
I t kA s
60 Hz 114
V /V 1600 to 2000 V
DRM RRM
t Typical 100 s
q
T -40 to +125 C
J
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V /V , MAXIMUM REPETITIVE PEAK V , MAXIMUM I /I MAXIMUM
DRM RRM RSM DRM RRM
TYPE VOLTAGE
AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE AT T = T MAXIMUM
J J
NUMBER CODE
V V mA
16 1600 1700
VS-ST180S 30
20 2000 2100
Revision: 27-Sep-17 Document Number: 94397
1
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST180SPbF Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS
200 A
Maximum average on-state current
I 180 conduction, half sine wave
T(AV)
at case temperature
85 C
Maximum RMS on-state current I DC at 76 C case temperature 314
T(RMS)
t = 10 ms 5000
No voltage
t = 8.3 ms reapplied 5230 A
Maximum peak, one-cycle
I
TSM
non-repetitive surge current
t = 10 ms 4200
100 % V
RRM
t = 8.3 ms reapplied 4400
Sinusoidal half wave,
initial T = T maximum
t = 10 ms 125
No voltage J J
t = 8.3 ms reapplied 114
2 2 2
Maximum I t for fusing I t kA s
t = 10 ms 88
100 % V
RRM
t = 8.3 ms reapplied 81
2 2 2
Maximum I t for fusing I t t = 0.1 to 10 ms, no voltage reapplied 1250 kA s
Low level value of threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 1.08
T(TO)1 T(AV) T(AV) J J
V
High level value of threshold voltage V (I > x I ), T = T maximum 1.14
T(TO)2 T(AV) J J
Low level value of on-state slope resistance r (16.7 % x x I < I < x I ), T = T maximum 1.18
t1 T(AV) T(AV) J J
m
High level value of on-state slope resistance r (I > x I ), T = T maximum 1.14
t2 T(AV) J J
Maximum on-state voltage V I = 570 A, T = 125 C, t = 10 ms sine pulse 1.75 V
TM pk J p
Maximum holding current I 600
H
T = T maximum, anode supply 12 V resistive load mA
J J
Maximum (typical) latching current I 1000 (300)
L
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS
Maximum non-repetitive rate of rise of Gate drive 20 V, 20 , t 1 s
r
dI/dt 1000 A/s
turned-on current T = T maximum, anode voltage 80 % V
J J DRM
Gate current 1 A, dI /dt = 1 A/s
g
Typical delay time t 1.0
d
V = 0.67 % V , T = 25 C
d DRM J
s
I = 300 A, T = T maximum, dI/dt = 20 A/s,
TM J J
Typical turn-off time t 100
q
V = 50 V, dV/dt = 20 V/s, gate 0 V 100 , t = 500 s
R p
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS
Maximum critical rate of rise of
dV/dt T = T maximum linear to 80 % rated V 500 V/s
J J DRM
off-state voltage
Maximum peak reverse and I ,
RRM
T = T maximum, rated V /V applied 30 mA
J J DRM RRM
off-state leakage current I
DRM
Revision: 27-Sep-17 Document Number: 94397
2
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000