VS-ST1280C..K Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Hockey-PUK Version), 2310 A FEATURES Center amplifying gate Metal case with ceramic insulator International standard case K-PUK (A-24) High profile hockey PUK Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 TYPICAL APPLICATIONS DC motor controls K-PUK (A-24) Controlled DC power supplies AC controllers PRIMARY CHARACTERISTICS I 2310 A T(AV) V /V 400 V, 600 V DRM RRM V 1.44 V TM I 100 mA GT T -40 C to +125 C J Package K-PUK (A-24) Circuit configuration Single SCR MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS VALUES UNITS 2310 A I T(AV) T 55 C hs 4150 A I T(RMS) T 25 C hs 50 Hz 42 500 I A TSM 60 Hz 44 500 50 Hz 9027 2 2 I t kA s 60 Hz 8240 V /V 400 to 600 V DRM RRM t Typical 200 s q T -40 to +125 C J ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS V V , MAXIMUM REPETITIVE PEAK V , MAXIMUM I I MAXIMUM DRM/ RRM RSM DRM/ RRM VOLTAGE TYPE NUMBER AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE AT T = T MAXIMUM J J CODE V V mA 04 400 500 VS-ST1280C..K 100 06 600 700 Revision: 21-Sep-17 Document Number: 93718 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 VS-ST1280C..K Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS 2310 (885) A Maximum average on-state current 180 conduction, half sine wave I T(AV) at heatsink temperature Double side (single side) cooled 55 (85) C Maximum RMS on-state current I 25 C heatsink temperature double side cooled 4150 T(RMS) t = 10 ms 42 500 No voltage reapplied t = 8.3 ms 44 500 A Maximum peak, one-cycle I TSM non-repetitive surge current t = 10 ms 35 700 100 % V RRM reapplied t = 8.3 ms 37 400 Sinusoidal half wave, initial T = T maximum t = 10 ms J J 9027 No voltage reapplied t = 8.3 ms 8241 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 6383 100 % V RRM reapplied t = 8.3 ms 5828 2 2 2 Maximum I t for fusing I t t = 0.1 to 10 ms, no voltage reapplied 90 270 kA s Low level value of threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 0.83 T(TO)1 T(AV) T(AV) J J V High level value of threshold voltage V (I > x I ), T = T maximum 0.90 T(TO)2 T(AV) J J Low level value of on-state slope resistance r (16.7 % x x I < I < x I ), T = T maximum 0.077 t1 T(AV) T(AV) J J m High level value of on-state slope resistance r (I > x I ), T = T maximum 0.068 t2 T(AV) J J Maximum on-state voltage V I = 8000 A, T = T maximum, t = 10 ms sine pulse 1.44 V TM pk J J p Maximum holding current I 600 H T = 25 C, anode supply 12 V resistive load mA J Typical latching current I 1000 L SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum non-repetitive rate of Gate drive 20 V, 20 , t 1 s r dI/dt 1000 A/s rise of turned-on current T = T maximum, anode voltage 80 % V J J DRM Gate current 1 A, dI /dt = 1 A/s g Typical delay time t 1.9 d V = 0.67 % V , T = 25 C d DRM J s I = 550 A, T = T maximum, dI/dt = 40 A/s, TM J J Typical turn-off time t 200 q V = 50 V, dV/dt = 20 V/s, gate 0 V 100 , t = 500 s R p BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum critical rate of rise of dV/dt T = T maximum linear to 80 % rated V 500 V/s J J DRM off-state voltage Maximum peak reverse and I , RRM T = T maximum, rated V /V applied 100 mA J J DRM RRM off-state leakage current I DRM Revision: 21-Sep-17 Document Number: 93718 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000