VS-ST650C..L Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Hockey PUK Version), 790 A FEATURES Center amplifying gate Metal case with ceramic insulator International standard case B-PUK (TO-200AC) Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 TYPICAL APPLICATIONS DC motor control Controlled DC power supplies B-PUK (TO-200AC) AC controllers PRIMARY CHARACTERISTICS I 790 A T(AV) V /V 2000 V, 2200 V, 2400 V DRM RRM V 2.07 V TM I 100 mA GT T -40 C to +125 C J Package B-PUK (TO-200AC) Circuit configuration Single SCR MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS VALUES UNITS 790 A I T(AV) T 55 C hs 1557 A I T(RMS) T 25 C hs 50 Hz 10 100 I A TSM 60 Hz 10 700 50 Hz 510 2 2 I t kA s 60 Hz 475 V /V 2000 to 2400 V DRM RRM t Typical 200 s q T -40 to +125 C J ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS V /V , MAXIMUM REPETITIVE V , MAXIMUM I /I MAXIMUM DRM RRM RSM DRM RRM VOLTAGE TYPE NUMBER PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE AT T = T MAXIMUM J J CODE V V mA 20 2000 2100 VS-ST650C..L 22 2200 2300 80 24 2400 2500 Revision: 21-Sep-17 Document Number: 93738 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 VS-ST650C..L Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS 790 (324) A Maximum average on-state current 180 conduction, half sine wave I T(AV) at heatsink temperature Double side (single side) cooled 55 (85) C Maximum RMS on-state current I DC at 25 C heatsink temperature double side cooled 1857 T(RMS) t = 10 ms 10 100 No voltage reapplied t = 8.3 ms 10 700 A Maximum peak, one-cycle I TSM non-repetitive surge current t = 10 ms 8600 100 % V RRM reapplied t = 8.3 ms 9150 Sinusoidal half wave, initial T = T maximum t = 10 ms J J 510 No voltage reapplied t = 8.3 ms 475 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 370 100 % V RRM reapplied t = 8.3 ms 347 2 2 2 Maximum I t for fusing I t t = 0.1 to 10 ms, no voltage reapplied 5100 kA s Low level value of threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 1.04 T(TO)1 T(AV) T(AV) J J V High level value of threshold voltage V (I > x I ), T = T maximum 1.13 T(TO)2 T(AV) J J Low level value of on-state slope r (16.7 % x x I < I < x I ), T = T maximum 0.61 t1 T(AV) T(AV) J J resistance m High level value of on-state r (I > x I ), T = T maximum 0.35 t2 T(AV) J J slope resistance Maximum on-state voltage V I = 1700 A, T = T maximum, t = 10 ms sine pulse 2.07 V TM pk J J p Maximum holding current I 600 H T = 25 C, anode supply 12 V resistive load mA J Typical latching current I 1000 L SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum non-repetitive rate of Gate drive 20 V, 20 , t 1 s r dI/dt 1000 A/s rise of turned-on current T = T maximum, anode voltage 80 % V J J DRM Gate current 1 A, dI /dt = 1 A/s g Typical delay time t 1.0 d V = 0.67 % V , T = 25 C d DRM J s I = 750 A, T = T maximum, dI/dt = 60 A/s TM J J Maximum turn-off time t 200 q V = 50, dV/dt = 20 V/s, Gate 0 V 100 , t = 500 s R p BLOCKING PARAMETER SYMBOLTEST CONDITIONS VALUESUNITS Maximum critical rate of rise of off-state voltage dV/dt T = T maximum linear to 80 % rated V 500 V/s J J DRM Maximum peak reverse and off-state leakage I , RRM T = T maximum, rated V /V applied 80 mA J J DRM RRM current I DRM Revision: 21-Sep-17 Document Number: 93738 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000