VS-VSK.230..PbF Series www.vishay.com Vishay Semiconductors SCR/SCR and SCR/Diode (MAGN-A-PAK Power Modules), 230 A FEATURES High voltage Electrically isolated base plate 3500 V isolating voltage RMS Industrial standard package Simplified mechanical designs, rapid assembly High surge capability Large creepage distances UL approved file E78996 MAGN-A-PAK Designed and qualified for industrial level Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 DESCRIPTION PRIMARY CHARACTERISTICS This VSK series of MAGN-A-PAK modules uses high voltage I 230 A T(AV) power thyristor/thyristor and thyristor/diode in seven basic Type Modules - thyristor, standard configurations. The semiconductors are electrically isolated Package MAGN-A-PAK from the metal base, allowing common heatsinks and compact assemblies to be built. They can be interconnected to form single phase or three phase bridges or as AC-switches when modules are connected in anti-parallel mode. These modules are intended for general purpose applications such as battery chargers, welders, motor drives, UPS, etc. MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS VALUES UNITS I 85 C 230 T(AV) I 510 T(RMS) A 50 Hz 7500 I TSM 60 Hz 7850 50 Hz 280 2 2 I t kA s 60 Hz 260 2 2 I t 280 kA s V /V 800 to 2000 V DRM RRM T Range -40 to +130 C J ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS V /V , MAXIMUM REPETITIVE V , MAXIMUM I /I RRM DRM RSM RRM DRM VOLTAGE PEAK REVERSE AND OFF-STATE NON-REPETITIVE PEAK AT 130 C TYPE NUMBER CODE BLOCKING VOLTAGE REVERSE VOLTAGE MAXIMUM V V mA 08 800 900 12 1200 1300 VS-VSK.230- 16 1600 1700 50 18 1800 1900 20 2000 2100 Revision: 12-Nov-2018 Document Number: 93053 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000VS-VSK.230..PbF Series www.vishay.com Vishay Semiconductors ON-STATE CONDUCTION PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS 230 A Maximum average on-state current I T(AV) 180 conduction, half sine wave at case temperature 85 C Maximum RMS on-state current I As AC switch 510 T(RMS) t = 10 ms 7500 No voltage reapplied t = 8.3 ms 7850 A Maximum peak, one-cycle on-state I TSM non-repetitive, surge current t = 10 ms 6300 100 % V RRM Sinusoidal reapplied t = 8.3 ms 6600 half wave, initial t = 10 ms 280 No voltage T = T maximum J J reapplied t = 8.3 ms 256 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 198 100 % V RRM reapplied t = 8.3 ms 181 2 2 2 Maximum I t for fusing I t t = 0.1 ms to 10 ms, no voltage reapplied 2800 kA s Low level value or threshold voltage V (16.7 % x x I < I < x I ), T = T maximum 1.03 T(TO)1 T(AV) T(AV) J J V High level value of threshold voltage V (I > x I ), T = T maximum 1.07 T(TO)2 T(AV) J J Low level value on-state slope resistance r (16.7 % x x I < I < x I ), T = T maximum 0.77 t1 T(AV) T(AV) J J m High level value on-state slope resistance r (I > x I ), T = T maximum 0.73 t2 T(AV) J J I = x I , T = T maximum, 180 conduction, TM T(AV) J J Maximum on-state voltage drop V 1.59 V TM 2 average power = V x I + r x (I ) T(TO) T(AV) f T(RMS) Maximum holding current I Anode supply = 12 V, initial I = 30 A, T = 25 C 500 H T J mA Anode supply = 12 V, resistive load = 1 , Maximum latching current I 1000 L gate pulse: 10 V, 100 s, T = 25 C J SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Typical delay time t 1.0 d T = 25 C, gate current = 1 A dI /dt = 1 A/s, J g V = 0.67 % V Typical rise time t d DRM 2.0 r s I = 300 A dI/dt = 15 A/s T = T maximum TM J J Typical turn-off time t 50 to 150 q V = 50 V dV/dt = 20 V/s gate 0 V, 100 R BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum peak reverse and I RRM, T = T maximum 50 mA J J off-state leakage current I DRM RMS insulation voltage V 50 Hz, circuit to base, all terminals shorted, 25 C, 1 s 3000 V INS Critical rate of rise of off-state voltage dV/dt T = T maximum, exponential to 67 % rated V 1000 V/s J J DRM TRIGGERING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum peak gate power P t 5 ms, T = T maximum 10.0 GM p J J W Maximum average gate power P f = 50 Hz, T = T maximum 2.0 G(AV) J J Maximum peak gate current + I t 5 ms, T = T maximum 3.0 A GM p J J Maximum peak negative gate voltage - V t 5 ms, T = T maximum 5.0 GT p J J T = -40 C 4.0 J V Anode supply = 12 V, Maximum required DC gate voltage to trigger V T = 25 C 3.0 GT J resistive load Ra = 1 T = T maximum 2.0 J J T = - 40 C 350 J Anode supply = 12 V, Maximum required DC gate current to trigger I T = 25 C 200 mA GT J resistive load Ra = 1 T = T maximum 100 J J Maximum gate voltage that will not trigger V T = T maximum, rated V applied 0.25 V GD J J DRM Maximum gate current that will not trigger I T = T maximum, rated V applied 10.0 mA GD J J DRM Maximum rate of rise of turned-on current dI/dt T = T maximum, I = 400 A, rated V applied 500 A/s J J TM DRM Revision: 12-Nov-2018 Document Number: 93053 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000