W25X20CLSNIG TR Winbond

W25X20CL 2.5 / 3 / 3.3 V 2M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI Publication Release Date: August 06, 2015 - 1 - Revision F W25X20CL Table of Contents 1. GENERAL DESCRIPTION ......................................................................................................... 4 2. FEATURES ................................................................................................................................. 4 3. PIN CONFIGURATION SOIC 150-MIL, VSOP 150-MIL ............................................................ 5 4. PAD CONFIGURATION WSON 6X5-MM AND USON 2X3-MM ................................................ 5 5. PIN DESCRIPTION SOIC VSOP 150-MIL, WSON 6X5-MM AND USON 2X3-MM ................... 5 5.1 Package Types ............................................................................................................... 6 5.2 Chip Select (/CS) ............................................................................................................ 6 5.3 Serial Data Input, Output and IOs (DI, DO, IO0 and IO1) .............................................. 6 5.4 Write Protect (/WP) ......................................................................................................... 6 5.5 HOLD (/HOLD) ................................................................................................................ 6 5.6 Serial Clock (CLK) .......................................................................................................... 6 6. BLOCK DIAGRAM ...................................................................................................................... 7 7. FUNCTIONAL DESCRIPTION.................................................................................................... 8 7.1 SPI OPERATIONS.......................................................................................................... 8 7.1.1 Standard SPI Instructions ................................................................................................. 8 7.1.2 Dual SPI Instructions ........................................................................................................ 8 7.1.3 Hold Function .................................................................................................................... 8 7.2 WRITE PROTECTION .................................................................................................... 9 7.2.1 Write Protect Features ...................................................................................................... 9 8. CONTROL AND STATUS REGISTERS ................................................................................... 10 8.1 STATUS REGISTER .................................................................................................... 10 8.1.1 BUSY .............................................................................................................................. 10 8.1.2 Write Enable Latch (WEL) .............................................................................................. 10 8.1.3 Block Protect Bits (BP1, BP0) ......................................................................................... 10 8.1.4 Top/Bottom Block Protect (TB) ....................................................................................... 10 8.1.5 Reserved Bits ................................................................................................................. 11 8.1.6 Status Register Protect (SRP) ........................................................................................ 11 8.1.7 Status Register Memory Protection ................................................................................ 12 8.2 INSTRUCTIONS ........................................................................................................... 13 8.2.1 Manufacturer and Device Identification ........................................................................... 13 (1) 8.2.2 Instruction Set ............................................................................................................. 14 8.2.3 Write Enable (06h) .......................................................................................................... 15 8.2.4 Write Enable for Volatile Status Register (50h) ............................................................... 15 8.2.5 Write Disable (04h) ......................................................................................................... 16 8.2.6 Read Status Register (05h) ............................................................................................ 16 8.2.7 Write Status Register (01h) ............................................................................................. 17 8.2.8 Read Data (03h) ............................................................................................................. 18 8.2.9 Fast Read (0Bh).............................................................................................................. 19 8.2.10 Fast Read Dual Output (3Bh) ....................................................................................... 20 8.2.11 Fast Read Dual I/O (BBh) ............................................................................................. 21 8.2.12 Continuous Read Mode Bits (M7-0) .............................................................................. 23 8.2.13 Continuous Read Mode Reset (FFFFh) ........................................................................ 23 Publication Release Date: August 06, 2015 - 2 - Revision F