ADVANCED LINEAR ALD7555/ALD7556 DEVICES, INC. SINGLE/DUAL CMOS ANALOG RC TIMER GENERAL DESCRIPTION BENEFITS Saves battery power The ALD7555/ALD7556 timers are high performance single/dual mono- Eliminates additional buffer lithic analog RC timing circuits. They offer significantly upgraded perfor- Smaller, lower cost capacitor mance in speed, leakage currents, supply current, stability, temperature voltage stability, and discharge output drive when compared to SE555/ Extended range of time constants NE555,ICL7555, TLC555, and ICM7555. APPLICATIONS The ALD7555/ALD7556 offer the benefits of high input impedance, thereby High speed one-shot (monostable) allowing smaller timing capacitors and a longer timing cycle high speed Precision sequential timing low power dissipation for battery operated environment reduced supply Long delay timer current spikes, allowing smaller and lower cost decoupling capacitors. Pulse width and pulse position modulation Missing pulse detector Each timer is capable of producing accurate time delays and oscillations in both monostable and astable operation, and operates in the one-shot Frequency divider (monostable) mode or 50% duty cycle free running oscillation mode with a Synchronized timer single resistor R and one capacitor C. The inputs and outputs are fully compatible with CMOS, NMOS or TTL logic. PIN CONFIGURATION There are three matched internal resistors (approximately 200K each) ALD7555 that set the threshold and trigger levels at two-thirds and one-third respec- + tively of V . These levels can be adjusted by using the control terminal. GND 1 8 V+ When the trigger input is below the trigger level, the output is in the high TRIG 2 7 DISC state and sourcing 2mA. When the threshold input is above the threshold OUT 3 6 THRES level at the same time the trigger input is above the trigger level, the internal RST 4 5 CONT flip-flop is reset, the output goes to the low state and sinks up to 10mA. The reset input overrides all other inputs and when it is active (reset voltage less SAL, PAL, DA PACKAGES than 1V), the output is in the low state. The discarge output has been signifcantly enhanced to eliminate the need for a separate external driver. ALD7556 FEATURES + 1 14 V DSC1 Improved accuracy and temperature stability THRES 2 13 DSC 1 2 High speed operation -- 2.5MHz typical oscillation at 5V CONT 12 THRES 1 3 2 High Discharge Sinking Current of 80mA at 5V 4 RST1 11 CONT 2 Guaranteed low operating supply voltage of 2V to 10V OUT 5 10 RST 1 2 Functional equivalent to and same pin-out as NE555/NE556, 6 9 OUT SE555, TLC555, ICM7555/ICM7556 TRIG1 2 Greatly expanded high and low frequency ranges 7 8 GND TRIG2 High speed, low power, monolithic CMOS technology SBL, PBL, DB PACKAGES Low supply current, typically: 50A for ALD7555, 100A for ALD7556 Extremely low trigger, threshold and reset currents 10pA typical Operates in both monostable and astable modes BLOCK DIAGRAM (EACH TIMER) Fixed 50% duty cycle or adjustable duty cycle CMOS, NMOS and TTL compatible input/output + V Low supply current spikes (8) Rail to rail output RESET (4) THRESHOLD ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) (6) R R CONTROL Operating Temperature Range * (5) OUTPUT R (3) 0C to +70C0C to +70C -55C to +125C S DISCHARGE 8-Pin Small Outline 8-Pin Plastic 8-Pin CERDIP (7) TRIGGER (2) Package (SOIC) DIP Package Package R ALD7555SAL ALD7555PAL ALD7555DA 14-Pin Small Outline 14-Pin Plastic 14-Pin CERDIP GND (1) Package (SOIC) DIP Package Package ALD7556SBL ALD7556PBL ALD7556DB * Contact factory for leaded (non-RoHS) or high temperature versions. Rev 2.0 2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.comABSOLUTE MAXIMUM RATINGS + Supply voltage, V 13.2V + Input voltage range -0.3V to V +0.3V Power dissipation 600 mW Operating temperature range SAL, SBL, PAL, PBL package 0C to + 70C DA, DB package -55C to +125C Storage temperature range -65C to +150C Lead temperature, 10 seconds +260C OPERATING ELECTRICAL CHARACTERISTICS o + T = 25 C V = +5V unless otherwise specified A Parameter Symbol Min Typ Max Unit Test Conditions + Supply Voltage V 210 V 50 90 A Outputs Unloaded Supply Current ALD7555 I S Supply Current ALD7556 I 100 180 A S Timing error / Astable mode t 1.0 2.5 % C = 0.1F err Initial Accuracy 1 Drift with Temperature t/T 10.0 ppm/CR = 1K A 1 + Drift with Supply Voltage t/V 0.2 %/V R = 1K B Threshold Voltage V 3.233 3.333 3.433 V TH Trigger Voltage V 1.567 1.667 1.767 V TRIG 2 Trigger Current I .01 0.4 nA TRIG 0.4 0.7 1.0 V Reset Voltage V RST 2 Reset Current I .01 0.4 nA RST 2 Threshold Current I .01 0.4 nA TH Control Voltage Level V 3.200 3.333 3.467 V CONT Output Voltage Drop (Low) V 0.2 0.4 V I = 10mA OL SINK Output Voltage Drop (High) V 4.2 4.6 V I = -2mA OH SOURCE 1 Rise Time of Output t 10 30 ns R = 10M r L 1 Fall Time of Output t 10 30 ns C = 10pF f L Discharge Transistor I .01 10 nA DL Leakage Current Discharge Voltage Drop V 0.5 1.0 V I = 80mA DISC DISCHARGE 0.2 0.4 V I = 30mA DISCHARGE Maximum Frequency R = 470 A Astable Mode f 1.0 2.5 MHz R = 200 MAX B C =100pF T 1 Minimum Trigger Pulse Width t 50 100 ns TRIG 1 Notes: Sample tested parameters. 2 Consists of junction leakage currents with strong temperature dependence. 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