AS29CF040-55CCIN 512K X 8 Bit CMOS 5.0 Volt-only Document Title 512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector - Parallel Flash Memory Revision History Rev. No. History Issue Remark Date 1.0 Initial issue July 18, 2019 Preliminary Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 27 - Rev.1.0. July 2019AS29CF040-55CCIN 512K X 8 Bit CMOS 5.0 Volt-only Features - Embedded Program algorithm automatically writes and 5.0V 10% for read and write operations verifies bytes at specified addresses Access times: - 55 (max.) Minimum 100,000 program/erase cycles per sector Current: 20-year data retention at 125C - 20 mA typical active read current - Reliable operation for the life of the system - 30 mA typical program/erase current Compatible with JEDEC-standards -1 A typical CMOS standby -Pinout and software compatible with single-power- supply Flash memory standard Flexible sector architecture - Superior inadvertent write protection - 8 uniform sectors of 64 Kbyte each - Any combination of sectors can be erased Polling and toggle bits Data - Supports full chip erase - Provides a software method of detecting completion of - Sector protection: program or erase operations A hardware method of protecting sectors to prevent Erase Suspend/Erase Resume any inadvertent program or erase operations within that - Suspends a sector erase operation to read data from, sector or program data to, a erasnon-ing sector, then Industrial operating temperature range: -40C~+85 C resumes the erase operation Package options Embedded Erase Algorithms - 32-pin PLCC - Embedded Erase algorithm will automatically erase the - All Pb-free (Lead-free) products are RoHS2.0 compliant entire chip or any combination of designated sectors and verify the erased sectors General Description The AS29CF040-55CCIN is a 5.0 volt-only Flash memory Reading data out of the device is similar to reading from organized as 524,288 bytes of 8 bits each. The 512 other Flash or EPROM devices. Kbytes of data are further divided into eight sectors of 64 Device programming occurs by writing the proper program Kbytes each for flexible sector erase capability. The 8 bits command sequence. This initiates the Embedded Program of data appear on I/O0 - I/O7 while the addresses are algorithm - an internal algorithm that automatically times the input on A0 to A18. The AS29CF040-55CCIN is program pulse widths and verifies proper program margin. offered in 32-pin PLCC packages. This device is Device erasure occurs by executing the proper erase designed to be programmed in-system with the command sequence. This initiates the Embedded Erase standard system 5.0volt VCC supply. Additional 12.0 algorithm - an internal algorithm that automatically volt VPP is not required for in-system write or erase preprograms the array (if is it not already programmed) operations. However, the AS29CF040-55CCIN can also before executing the erase operation. During erase, the be programmed in standard EPROM programmers. device automatically times he t erase pulse widths and The AS29CF040-55CCIN has a second toggle bit, I/O2, verifies proper erase margin. to indicate whether the addressed sector is being selected The host system can detectw hether a program or erase for erase, and also offers the ability to program in the Erase operation is complete by reading the I/O7 ( Polling) and Data Suspend mode. The standard AS29CF040-55CCIN offers I/O6 (toggle) status bits. After a program or erase cycle has access times of 55 ns, allowing high-speed been completed, the device is ready to read array data or microprocessors to operate without wait states. To eliminate accept another command. bus contention the device has separate The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data chip enable ( CE ), write enable ( WE ) and output enable contents of other sectors. The AS29CF040-55CCIN is fully ( ) controls. OE erased when shipped from the factory. The device requires only a single 5.0 volt power supply for The hardware sector protection feature disables operations both read and write functions. Internally generated for both program and erase in any combination of the sectors and regulated voltages are provided for the program and of memor. y This can be achieved via programming erase operations. equipment. The AS29CF040-55CCIN is entirely software command set The Erase Suspend feature enables the user to put erase on compatible with the JEDEC single-power-supply Flash hold for any period of time to read data from, or program standard. Commands are written to the command data to, any other sector that is not selected for erasure. register using standard microprocessor write timings. True background erase can thus be achieved. Register contents serve as input to an internal state- Power consumption is greatly reduced when the device is machine that controls the erase and programming circuitry. placed in the standby mode. Write cycles also internally latch addresses anddata needed for the programming and erase operations. Confidential - 2 of 27 - Rev.1.0. July 2019