AS29CF800T-55TIN AS29CF800B-55TIN 1M X 8 Bit / 512K X 16 Bit CMOS 5.0 Volt-only Document Title 1M X 8 Bit / 512K X 16 Bit CMOS 5.0 Volt-only - PARALLEL NOR FLASH Revision History Rev. No. History IssueDate Remark 0.0 Initial issue July 15, 2019 Preliminary Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 39 - Rev.1.0 July. 2019AS29CF800T-55TIN AS29CF800B-55TIN Parallel NOR Flash -1M X 8 Bit / 512K X 16 Bit CMOS 5.0 Volt-only Features Single power supply operation Minimum 100,000 program/erase cycles per sector - Full voltage range: 4.5 to 5.5 volt for read and write 20-year data retention at 125C operations - Reliable operation for the life of the system Access time: Compatible with JEDEC-standards - 55ns (max.) - Pinout and software compatible with single-power-supply Current: Flash memory standard - 20mA typical active read current - Superior inadvertent write protection - 30mA typical program/erase current Data Polling and toggle bits - 6uA typical CMOS standby - Provides a software method of detecting completion of Flexible sector architecture program or erase operations - 16 Kbyte/ 8 KbyteX2/ 32 Kbyte/ 64 KbyteX15 sectors Ready / pin (RY / ) BUSY BY - 8 Kword/ 4 KwordX2/ 16 Kword/ 32 KwordX15 sectors - Provides a hardware method of detecting completion of - Any combination of sectors can be erased program or erase operations - Supports full chip erase Erase Suspend/Erase Resume - Sector protection: - Suspends a sector erase operation to read data from, or A hardware method of protecting sectors to prevent any program data to, a non-erasing sector, then resumes the inadvertent program or erase operations within that erase operation sector. Temporary Sector Unprotect feature allows code Hardware reset pin ( ) changes in previously locked sectors RESET Industrial operating temperature range: -40C to +85C for - Hardware method to reset the device to reading array -U series data Unlock Bypass Program Command Package options - Reduces overall programming time when issuing - 48-pin TSOP (I) multiple program command sequence - All Pb-free (Lead-free) products are RoHS2.0 compliant Top or bottom boot block configurations available Embedded Algorithms - Embedded Erase algorithm will automatically erase the entire chip or any combination of designated sectors and verify the erased sectors - Embedded Program algorithm automatically writes and verifies data at specified addresses General Description The device requires only a single 5.0 volt power supply for The AS29CF800T/B-55TIN is an 8Mbit, 5.0 volt-only both read and write functions. Internally generated and Flash memory organized as 1,048,576 bytes of 8 bits or regulated voltages are provided for the program and erase 524,288 words of 16 bits each. The 8 bits of data appear operations. on I/O0 - I/O7 the 16 bits of data appear on I/O0~I/O15. The AS29CF800T/B-55TIN is entirely software command The is offered in 48-Pin TSOP packages. This device is set compatible with the JEDEC single-power-supply designed to be programmed in-system with the standard Flash standard. Commands are written to the system 5.0 volt VCC supply. Additional 12.0 volt VPP is not command register using standard microprocessor write required for in-system write or erase operations. However, timings. Register contents serve as input to an internal the AS29CF800T/B-55TIN can also be programmed in state-machine that controls the erase and programming standard EPROM programmers. The AS29CF800T/B-55TIN circuitry. Write cycles also internally latch addresses and has the first toggle bit, I/O6, which indicates whether an data needed for the programming and erase operations. Embedded Program or Erase is in progress, or it is in the Reading data out of the device is similar to reading from Erase Suspend. Besides the I/O6 toggle bit, the other Flash or EPROM devices. AS29CF800T/B-55TIN has a second toggle bit, I/O2, to Device programming occurs by writing the proper program indicate whether the addressed sector is being selected command sequence. This initiates the Embedded Program for erase. The AS29CF800T/B-55TIN also offers the algorithm - an internal algorithm that automatically times the ability to program in the Erase Suspend mode. The program pulse widths and verifies proper program margin. standard AS29CF800T/B-55TIN offers access time of 55ns, Device erasure occurs by executing the proper erase allowing high-speed microprocessors to operate command sequence. This initiates the Embedded Erase without wait states. To eliminate bus contention the device algorithm - an internal algorithm that automatically has separate chip enable ( ), write enable ( WE ) and CE preprograms the array (if it is not already programmed) output enable ( ) controls. OE Confidential - 2 of 39 - Rev.1.0 July. 2019