A623308AM-70SF Amic

A623308A Series 8K X 8 BIT CMOS SRAM Document Title 8K X 8 BIT CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue November 9, 2004 Preliminary 1.0 Remove non-Pb-free package type July 3, 2006 Final Final version release (July, 2006, Version 1.0) AMIC Technology, Corp. A623308A(M) A623308A Series Preliminary 8K X 8 BIT CMOS SRAM Features Extended operating temperature range: 0C to 70C for - Power Supply Range: 4.5V to 5.5V S series, -25C to 85C for -SI series, -40C to 85C for Access times: 70 ns -SU series. A623308A-S series: Operating: 35mA (max.) Full static operation, no clock or refreshing required Standby: 10A (max.) All inputs and outputs are directly TTL-compatible A623308A-SI/SU series: Operating: 35mA (max.) Common I/O using three-state output Standby: 15A (max.) Data retention voltage: 2.0V (min.) Available in 28-pin, DIP/SOP and TSOP Pb-Free package only All Pb-free (Lead-free) products are RoHS compliant General Description Minimum standby power is drawn by this device when CE The A623308A is a low operating current 65,536-bit static is at a high level, independent of the other input levels. random access memory organized as 8,192 words by 8 bits Data retention is guaranteed at a power supply voltage as and operates on a voltage from 4.5V to 5.5V. low as 2.0V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Pin Configurations DIP / SOP TSOP 1 VCC NC 28 OE 1 28 A10 A11 2 27 CE A12 27 WE 2 A9 3 26 I/O7 A7 NC 3 26 A8 4 25 I/O6 I/O5 A6 4 A8 NC 5 24 25 WE 6 23 I/O4 A5 A9 5 24 VCC 7 22 I/O3 A623308AV A4 A11 6 23 NC 8 21 VSS A12 9 20 I/O2 A3 7 22 OE A7 10 19 I/O1 A2 8 A10 A6 11 18 I/O0 21 A5 12 17 A0 A1 9 20 CE A4 13 16 A1 I/O7 A0 10 19 A3 14 15 A2 11 18 I/O6 I/O0 I/O1 I/O5 12 17 I/O2 13 16 I/O4 GND 14 15 I/O3 (July, 2006, Version 1.0) 1 AMIC Technology, Corp. ~ ~ ~ ~