High Performance Narrow-Band Transceiver IC Data Sheet ADF7021 FEATURES On-chip VCO and fractional-N PLL On-chip, 7-bit ADC and temperature sensor Low power, narrow-band transceiver Fully automatic frequency control loop (AFC) Frequency bands using dual VCO Digital received signal strength indication (RSSI) 80 MHz to 650 MHz Integrated Tx/Rx switch 862 MHz to 950 MHz 0.1 A leakage current in power-down mode Modulation schemes 2FSK, 3FSK, 4FSK, MSK APPLICATIONS Spectral shaping Narrow-band standards Gaussian and raised cosine filtering ETSI EN 300 220, FCC Part 15, FCC Part 90, FCC Part 95, Data rates supported ARIB STD-T67 0.05 kbps to 32.8 kbps Low cost, wireless data transfer 2.3 V to 3.6 V power supply Remote control/security systems Programmable output power Wireless metering 16 dBm to +13 dBm in 63 steps Private mobile radio Automatic PA ramp control Wireless medical telemetry service (WMTS) Receiver sensitivity Keyless entry 130 dBm at 100 bps, 2FSK Home automation 122 dBm at 1 kbps, 2FSK Process and building control 113 dBm at 25 kbps, raised cosine 2FSK Pagers Patent pending, on-chip image rejection calibration FUNCTIONAL BLOCK DIAGRAM RSET CE MUXOUT CREG(1:4) TEMP MUX 7-BIT ADC SENSOR R LDO(1:4) LNA TEST MUX 2FSK LNA TxRxCLK 3FSK CLOCK RFIN RSSI/ 4FSK AND DATA Tx/Rx TxRxDATA IF FILTER LOG AMP RECOVERY RFINB CONTROL DEMODULATOR SWD GAIN AGC SLE CONTROL SERIAL SDATA PORT SREAD AFC CONTROL SCLK PA RAMP 2FSK GAUSSIAN/ - 3FSK 1/2 RAISED COSINE RFOUT DIV P N/N + 1 MODULATOR 4FSK FILTER MOD CONTROL 2 VCO1 3FSK ENCODING MUX CP PFD VCO2 CLK DIV R OSC DIV L1 L2 VCOIN CPOUT OSC1 OSC2 CLKOUT Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 05876-001ADF7021 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Receiver Setup ............................................................................. 34 Applications ....................................................................................... 1 Demodulator Considerations ................................................... 36 Functional Block Diagram .............................................................. 1 AFC Operation ........................................................................... 36 Revision History ............................................................................... 3 Automatic Sync Word Detection (SWD) ................................ 37 General Description ......................................................................... 4 Applications Information .............................................................. 38 Specifications ..................................................................................... 5 IF Filter Bandwidth Calibration ............................................... 38 RF and PLL Specifications ........................................................... 5 LNA/PA Matching ...................................................................... 38 Transmission Specifications ........................................................ 6 Image Rejection Calibration ..................................................... 39 Receiver Specifications ................................................................ 8 Packet Structure and Coding .................................................... 41 Digital Specifications ................................................................. 10 Applications Circuit ................................................................... 44 General Specifications ............................................................... 11 Serial Interface ................................................................................ 45 Timing Characteristics .............................................................. 11 Readback Format ........................................................................ 45 Absolute Maximum Ratings .......................................................... 15 Interfacing to Microcontroller/DSP ........................................ 46 ESD Caution ................................................................................ 15 Register 0N Register ............................................................... 47 Pin Configuration and Function Descriptions ........................... 16 Register 1VCO/Oscillator Register ...................................... 47 Typical Performance Characteristics ........................................... 18 Register 2Transmit Modulation Register ............................ 49 Frequency Synthesizer ................................................................... 22 Register 3Transmit/Receive Clock Register ........................ 50 Reference Input ........................................................................... 22 Register 4Demodulator Setup Register ............................... 51 MUXOUT .................................................................................... 23 Register 5IF Filter Setup Register ......................................... 52 Voltage Controlled Oscillator (VCO) ...................................... 24 Register 6IF Fine Cal Setup Register ................................... 53 Choosing Channels for Best System Performance ................. 25 Register 7Readback Setup Register ...................................... 54 Transmitter ...................................................................................... 26 Register 8Power-Down Test Register .................................. 55 RF Output Stage .......................................................................... 26 Register 9AGC Register ......................................................... 56 Modulation Schemes .................................................................. 26 Register 10AFC Register ....................................................... 57 Spectral Shaping ......................................................................... 28 Register 11Sync Word Detect Register ................................ 58 Modulation and Filtering Options ........................................... 29 Register 12SWD/Threshold Setup Register ........................ 58 Transmit Latency ........................................................................ 29 Register 133FSK/4FSK Demod Register ............................. 59 Test Pattern Generator ............................................................... 29 Register 14Test DAC Register ............................................... 60 Receiver Section .............................................................................. 30 Register 15Test Mode Register ............................................. 61 RF Front End ............................................................................... 30 Outline Dimensions ....................................................................... 62 IF Filter ........................................................................................ 30 Ordering Guide .......................................................................... 62 RSSI/AGC .................................................................................... 31 Demodulation, Detection, and CDR ....................................... 32 Rev. D Page 2 of 62