ADN2805ACPZ Analog Devices

1.25 Gbps Clock and Data Recovery IC Data Sheet ADN2805 FEATURES GENERAL DESCRIPTION Locks to 1.25 Gbps NRZ serial data input The ADN2805 provides the receiver functions of quantization Patented clock recovery architecture and clock and data recovery for 1.25 Gbps. The ADN2805 No reference clock required automatically locks to all data rates without the need for an Loss-of-lock indicator external reference clock or programming. All SONET jitter 2 I C interface to access optional features requirements are met, including jitter transfer, jitter generation, Single-supply operation: 3.3 V and jitter tolerance. Low power: 390 mW typical All specifications are specified for 40C to +85C ambient 5 mm 5 mm 32-lead LFCSP, Pb free temperature, unless otherwise noted. The ADN2805 is available in a compact 5 mm 5 mm 32-lead LFCSP. APPLICATIONS GbE line card FUNCTIONAL BLOCK DIAGRAM REFCLKP/REFCLKN LOL CF1 CF2 VCC VEE (OPTIONAL) LOOP FREQUENCY FILTER DETECT PIN PHASE PHASE LOOP BUFFER VCO NIN SHIFTER DETECT FILTER VREF DATA RE-TIMING 2 2 ADN2805 DATAOUTP/ CLKOUTP/ DATAOUTN CLKOUTN Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20082012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 07121-001ADN2805 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 10 Applications....................................................................................... 1 Functional Description.................................................................. 12 General Description ......................................................................... 1 Frequency Acquisition............................................................... 12 Functional Block Diagram .............................................................. 1 Input Buffer................................................................................. 12 Revision History ............................................................................... 2 Lock Detector Operation .......................................................... 12 Specifications..................................................................................... 3 SQUELCH Mode........................................................................ 13 Jitter Specifications....................................................................... 3 System Reset................................................................................ 13 2 Output and Timing Specifications ............................................. 4 I C Interface ................................................................................ 13 Absolute Maximum Ratings............................................................ 6 Applications Information .............................................................. 14 Thermal Characteristics .............................................................. 6 PCB Design Guidelines ............................................................. 14 ESD Caution.................................................................................. 6 Outline Dimensions....................................................................... 16 Pin Configuration and Function Descriptions............................. 7 Ordering Guide .......................................................................... 16 2 I C Interface Timing and Internal Register Description............. 8 REVISION HISTORY 3/12Rev. A to Rev. B Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 16 5/10Rev. 0 to Rev. A Changes to Figure 5 and Table 6..................................................... 7 Changes to Figure 14...................................................................... 14 Added Exposed Pad Notation to Outline Dimensions ............. 16 1/08Revision 0: Initial Version Rev. B Page 2 of 16