300 MHz, 32 16 Buffered Analog Crosspoint Switch ADV3202/ADV3203 FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS VNEG DVCC DGND Large, 32 16, nonblocking switch array G = +1 (ADV3202) or G = +2 (ADV3203) operation CLK 32 32 pin-compatible version available (ADV3200/ADV3201) 193-BIT SHIFT REGISTER DATA DATA IN Single +5 V, dual 2.5 V, or dual 3.3 V supply (G = +2) OUT 96 97 Serial programming of switch array UPDATE 2:1 OSD insertion mux per output PARALLEL LATCH CS ADV3202 Input sync-tip clamp RESET (ADV3203) 96 High impedance output disable allows connection of 16 16 5:32 ENABLE/ ENABLE/ DECODERS multiple devices with minimal output bus load BYPASS DISABLE Excellent video performance SYNC-TIP OUTPUT BUFFER CLAMP 512 60 MHz 0.1 dB gain flatness G = +1 (G = +2) 0.1% differential gain error (R = 150 ) L 0.1 differential phase error (R = 150 ) L Excellent ac performance Bandwidth: >300 MHz SWITCH OSD Slew rate: >400 V/s MATRIX MUX Low power: 1 W 32 16 INPUTS OUTPUTS Low all hostile crosstalk: 48 dB 5 MHz Reset pin allows disabling of all outputs Connected through a capacitor to ground, provides power-on reset capability 176-lead exposed pad LQFP package (24 mm 24 mm) 16 16 REFERENCE APPLICATIONS CCTV surveillance VCLAMP OSD OSD VREF INPUTS SWITCHES Routing of high speed signals, including Figure 1. Composite video (NTSC, PAL, S, SECAM) RGB and component video routing Compressed video (MPEG, wavelet) Video conferencing GENERAL DESCRIPTION The ADV3202/ADV3203 are 32 16 analog crosspoint switch an output bus if building a larger array. The ADV3202 has a matrices. They feature a selectable sync-tip clamp input for gain of +1 while the ADV3203 has a gain of +2 for ease of use in ac-coupled applications and a 2:1 on-screen display (OSD) back-terminated load applications. A single +5 V supply, dual insertion mux. With 48 dB of crosstalk and 80 dB isolation 2.5 V supplies, or dual 3.3 V supplies (G = +2) can be used at 5 MHz, the ADV3202/ADV3203 are useful in many high while consuming only 195 mA of idle current with all outputs density routing applications. The 0.1 dB flatness out to 60 MHz enabled. The channel switching is performed via a double makes the ADV3202/ADV3203 ideal for both composite and buffered, serial digital control that can accommodate daisy component video switching. chaining of several devices. The 16 independent output buffers of the ADV3202/ADV3203 The ADV3202/ADV3203 are packaged in a 176-lead exposed can be placed into a high impedance state for paralleling cross- pad LQFP package (24 mm 24 mm) and are available over the point outputs so that off-channels present minimal loading to extended industrial temperature range of 40C to +85C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Trademarks and registered trademarks are the property of their respective owners. 07526-001ADV3202/ADV3203 TABLE OF CONTENTS Features .............................................................................................. 1 Power Dissipation..........................................................................6 Applications ....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ..............................7 General Description ......................................................................... 1 Truth Table and Logic Diagram ............................................... 10 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 11 Specif icat ions ..................................................................................... 3 Theory of Operation ...................................................................... 14 OSD Disabled ................................................................................ 3 Applications Information .............................................................. 16 OSD Enabled ................................................................................. 4 Programming .............................................................................. 16 Timing Characteristics (Serial Mode) ....................................... 5 Outline Dimensions ....................................................................... 17 Absolute Maximum Ratings ............................................................ 6 Ordering Guide .......................................................................... 17 Thermal Resistance ...................................................................... 6 REVISION HISTORY 10/08Revision 0: Initial Version Rev. 0 Page 2 of 20