750 MHz, 16 8 Analog Crosspoint Switch Data Sheet ADV3224/ADV3225 FEATURES FUNCTIONAL BLOCK DIAGRAM SER/PAR D0 D1 D2 D3 D4 16 8 high speed, nonblocking switch array A0 Pinout and functionally equivalent to the AD8110/AD8111 A1 Drop-in compatible with the ADV3228/ADV3229 8 8 array A2 CLK Complete solution Buffered inputs 40-BIT SHIFT REGISTER WITH 4-BIT DATAOUT DATAIN Programmable high impedance outputs PARALLEL LOADING 8 output amplifiers, G = +1 (ADV3224), G = +2 (ADV3225) UPDATE 40 Drives 150 loads CE PARALLEL LATCH SET INDIVIDUAL Operates on 5 V supplies OR RESET ALL RESET 40 OUTPUTS TO OFF Low power: 0.5 W 8 DECODE Excellent ac performance 8 5:16 DECODERS 3 dB bandwidth OUTPUT ADV3224/ BUFFER 200 mV p-p: 1200 MHz (ADV3224), 900 MHz (ADV3225) 128 ADV3225 G = +1, G = +2 2 V p-p: 750 MHz (ADV3224), 850 MHz (ADV3225) 0.5 dB flatness (2 V p-p) 250 MHz (ADV3224), 235 MHz (ADV3225) Slew rate: 2500 V/s Serial or parallel programming of switch array 72-lead LFCSP (10 mm 10 mm) SWITCH MATRIX APPLICATIONS Routing of high speed signals including Video (NTSC, PAL, S, SECAM, YUV, RGB) Compressed video (MPEG, wavelet) 3-level digital video (HDB3) Data communications Figure 1. Telecommunications GENERAL DESCRIPTION The ADV3224/ADV3225 are high speed 16 8 analog crosspoint supplies of 5 V. Channel switching is performed via a serial switch matrices. They offer a 3 dB signal bandwidth of greater digital control that can accommodate the daisy chaining of than 750 MHz and a high slew rate of greater than 2500 V/s. several devices or via a parallel control to allow updating of an individual output without reprogramming the entire array. The ADV3224/ADV3225 include eight independent output buffers that can be placed into a high impedance state for The ADV3224/ADV3225 are available in the 72-lead LFCSP paralleling crosspoint outputs to prevent off channels from package over the extended industrial temperature range of loading the output bus. The ADV3224 has a gain of +1 and the 40C to +85C. ADV3225 has a gain of +2, and they both operate on voltage Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. 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Technical Support www.analog.com 16 INPUTS ENABLE/DISABLE 8 OUTPUTS 09317-001ADV3224/ADV3225 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions ..............................8 Applications ....................................................................................... 1 Truth Table and Logic Diagram ............................................... 10 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ........................................... 11 General Description ......................................................................... 1 Circuit Diagrams ............................................................................ 20 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 21 Specifications ..................................................................................... 3 Applications Information .............................................................. 22 Timing Characteristics (Serial) .................................................. 5 Serial Programming ................................................................... 22 Logic Levels ................................................................................... 5 Parallel Programming ................................................................ 22 Timing Characteristics (Parallel) ............................................... 6 Power-On Reset .......................................................................... 23 Absolute Maximum Ratings ............................................................ 7 Gain Selection ............................................................................. 23 Thermal Resistance ...................................................................... 7 Creating Larger Crosspoint Arrays .......................................... 23 Power Dissipation ......................................................................... 7 Outline Dimensions ....................................................................... 24 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 24 REVISION HISTORY 1/16Rev. A to Rev. B Change to Maximum Potential Difference (DVCC AVEE) Parameter, Table 5 ............................................................................. 7 Updated Outline Dimensions ....................................................... 24 12/10Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 24 11/10Revision 0: Initial Version Rev. B Page 2 of 24