750 MHz, 16 16 Analog Crosspoint Switch Data Sheet ADV3226/ADV3227 FEATURES FUNCTIONAL BLOCK DIAGRAM SER/PAR D0 D1 D2 D3 D4 16 16 high speed, nonblocking switch array A0 Pinout and functionally equivalent to the AD8114/AD8115 A1 Complete solution A2 CLK Buffered inputs A3 80-BIT SHIFT REGISTER Programmable high impedance outputs WITH 5-BIT DATAOUT DATAIN PARALLEL LOADING 16 output amplifiers, G = +1 (ADV3226), G = +2 (ADV3227) UPDATE Drives 150 loads 80 SET INDIVIDUAL Operates on 5 V supplies CE PARALLEL LATCH OR RESET ALL OUTPUTS TO OFF Low power: 1.3 W RESET 80 Excellent ac performance 16 DECODE 16 5:16 DECODERS 3 dB bandwidth 200 mV p-p: 820 MHz (ADV3226), 750 MHz (ADV3227) OUTPUT ADV3226/ BUFFER 256 2 V p-p: 600 MHz (ADV3226), 750 MHz (ADV3227) ADV3227 G = +1, G = +2 Slew rate: 2150 V/s (ADV3226), 2950 V/s (ADV3227) Serial or parallel programming of switch array 100-lead LFCSP (12 mm 12 mm) APPLICATIONS SWITCH MATRIX Routing of high speed signals including Video (NTSC, PAL, S, SECAM, YUV, RGB) Compressed video (MPEG, wavelet) 3-level digital video (HDB3) Data communications Telecommunications GENERAL DESCRIPTION Figure 1. The ADV3226/ADV3227 are high speed 16 16 analog crosspoint while consuming only 118 mA (ADV3226) and 133 mA switch matrices. They offer a 3 dB signal bandwidth greater (ADV3227) of idle current. Channel switching is performed via than 750 MHz and channel switch times of less than 20 ns with a serial digital control that can accommodate daisy chaining of 1% settling. several devices or via a parallel control to allow updating of an individual output without reprogramming the entire array. The ADV3226/ADV3227 include 16 independent output buffers that can be placed into a high impedance state for paralleling The ADV3226/ADV3227 are available in the 100-lead LFCSP crosspoint outputs to prevent off channels from loading the package over the extended industrial temperature range of output bus. The ADV3226 has a gain of +1 and the ADV3227 40C to +85C. has a gain of +2. They both operate on voltage supplies of 5 V Rev. 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Technical Support www.analog.com 16 INPUTS 16 OUTPUTS 08653-001ADV3226/ADV3227 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................7 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions ..............................8 General Description ......................................................................... 1 Truth Table and Logic Diagram ............................................... 10 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ........................................... 11 Revision History ............................................................................... 2 Circuit Diagrams ............................................................................ 20 Specifications ..................................................................................... 3 Theory of Operation ...................................................................... 21 Timing Characteristics (Serial) .................................................. 5 Applications Information .......................................................... 21 Logic Levels ................................................................................... 5 Power-On Reset .......................................................................... 22 Timing Characteristics (Parallel) ............................................... 6 Gain Selection ............................................................................. 22 Absolute Maximum Ratings ............................................................ 7 Creating Larger Crosspoint Arrays .......................................... 23 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 24 Power Dissipation ......................................................................... 7 Ordering Guide .......................................................................... 24 REVISION HISTORY 1/16Rev. 0 to Rev. A Change to Maximum Potential Difference (DVCC AVEE) Parameter, Table 5 ............................................................................. 7 Updated Outline Dimensions ....................................................... 24 4/10Revision 0: Initial Version Rev. A Page 2 of 24