750 MHz, 8 8 Analog Crosspoint Switch Data Sheet ADV3228/ADV3229 FEATURES FUNCTIONAL BLOCK DIAGRAM SER/PAR D0 D1 D2 D3 8 8 high speed, nonblocking switch array A0 Pinout and functionally equivalent to the AD8108/AD8109 A1 Drop-in compatible with ADV3224/ADV3225 16 8 array A2 CLK Complete solution 40-BIT SHIFT REGISTER Buffered inputs WITH 4-BIT DATAOUT DATAIN PARALLEL LOADING Programmable high impedance outputs UPDATE (RESERVED) 8 output amplifiers, G = +1 (ADV3228), G = +2 (ADV3229) 32 8 Drives 150 loads CE PARALLEL LATCH SET INDIVIDUAL OR RESET ALL Operates on 5 V supplies RESET OUTPUTS TO OFF 32 Low power: 0.5 W 8 DECODE 8 4:8 DECODERS Excellent ac performance 3 dB bandwidth OUTPUT ADV3228/ BUFFER 64 200 mV p-p: 1200 MHz (ADV3228), 900 MHz (ADV3229) ADV3229 G = +1, G = +2 2 V p-p: 750 MHz (ADV3228), 850 MHz (ADV3229) 0.5 dB flatness (2 V p-p): 250 MHz (ADV3228), 235 MHz (ADV3229) Slew rate: 2500 V/s SWITCH Serial or parallel programming of switch array 72-lead LFCSP (10 mm 10 mm) APPLICATIONS Routing of high speed signals including Video (NTSC, PAL, S, SECAM, YUV, RGB) Compressed video (MPEG, wavelet) Figure 1. 3-level digital video (HDB3) Data communications Telecommunications GENERAL DESCRIPTION The ADV3228/ADV3229 are high speed 8 8 analog crosspoint switching is performed via a serial digital control that can switch matrices. They offer a 3 dB large signal bandwidth of accommodate daisy chaining of several devices or via a parallel 750 MHz (ADV3228) and a slew rate of 2500 V/s. control to allow updating of an individual output without reprogramming the entire array. The ADV3228/ADV3229 include eight independent output buffers that can be placed into a high impedance state for paralleling The ADV3228/ADV3229 are available in the 72-lead LFCSP crosspoint outputs to prevent off channels from loading the output package over the extended industrial temperature range of bus. The ADV3228 has a gain of +1, the ADV3229 has a gain of 40C to +85C. +2, and they both operate on voltage supplies of 5 V. Channel Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. 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Technical Support www.analog.com 8 INPUTS ENABLED/DISABLED 8 OUTPUTS 09318-001ADV3228/ADV3229 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions ..............................8 Applications ....................................................................................... 1 Truth Table and Logic Diagram ............................................... 10 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ........................................... 11 General Description ......................................................................... 1 Circuit Diagrams ............................................................................ 20 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 21 Specifications ..................................................................................... 3 Applications Information .............................................................. 22 Timing Characteristics (Serial) .................................................. 5 Serial Programming ................................................................... 22 Logic Levels ................................................................................... 5 Parallel Programming ................................................................ 22 Timing Characteristics (Parallel) ............................................... 6 Power-On Reset .......................................................................... 23 Absolute Maximum Ratings ............................................................ 7 Gain Selection ............................................................................. 23 Thermal Resistance ...................................................................... 7 Creating Larger Crosspoint Arrays .......................................... 23 Power Dissipation ......................................................................... 7 Outline Dimensions ....................................................................... 24 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 24 REVISION HISTORY 1/16Rev. 0 to Rev. A Change to Maximum Potential Difference (DVCC to AVEE) Parameter, Table 5 ............................................................................. 7 Updated Outline Dimensions ....................................................... 24 11/10Revision 0: Initial Version Rev. A Page 2 of 24