CMOS a 80 MHz, Triple 8-Bit Video DAC ADV7120 FEATURES FUNCTIONAL BLOCK DIAGRAM 80 MHz Pipelined Operation Triple 8-Bit D/A Converters FS V V AA ADJUST REF RS-343A/RS-170 Compatible Outputs TTL Compatible Inputs REFERENCE AMPLIFIER +5 V CMOS Monolithic Construction ADV7120 COMP 40-Pin DIP or 44-Pin PLCC and 48-Lead TQFP CLOCK APPLICATIONS RED R0 8 8 REGISTER IOR High Resolution Color Graphics DAC R7 CAE/CAD/CAM Applications PIXEL Image Processing GREEN G0 8 INPUT 8 REGISTER IOG DAC G7 Instrumentation PORT Video Signal Reconstruction BLUE Desktop Publishing B0 8 8 REGISTER DAC IOB B7 Direct Digital Synthesis (DDS) and I/Q Modulation SPEED GRADES* REF WHITE 80 MHz CONTROL REGISTER SYNC BLANK 50 MHz I CONTROL SYNC SYNC 30 MHz GND PRODUCT HIGHLIGHTS GENERAL DESCRIPTION 1. Fast video refresh rate, 80 MHz. The ADV7120 (ADV ) is a digital to analog video converter on a single monolithic chip. The part is specifically designed for 2. Compatible with a wide variety of high resolution color high resolution color graphics and video systems. It is also ideal graphics video systems. for any high speed communications type applications requiring 3. Guaranteed monotonic with a maximum differential non- low cost, high speed DACs. It consists of three, high speed, linearity of 0.5 LSB. Integral nonlinearity is guaranteed to 8-bit, video D/A converters (RGB) a standard TTL input inter- be a maximum of 1 LSB. face and high impedance, analog output, current sources. The ADV7120 has three separate, 8-bit, pixel input ports, one each for red, green and blue video data. Additional video input controls on the part include composite sync, blank and refer- ence white. A single +5 V supply, an external 1.23 V reference and pixel clock input are all that are required to make the part operational. The ADV7120 is capable of generating RGB video output sig- nals, which are compatible with RS-343A and RS-170 video standards, without requiring external buffering. The ADV7120 is fabricated in a +5 V CMOS process. Its monolithic CMOS construction ensures greater functionality with low power dissipation. The part is packaged in both a 0.6 , 40-pin plastic DIP and a 44-pin plastic leaded (J-lead) chip car- rier, PLCC. The ADV7120 is also available in a very small 48- lead Thin Quad Flatpack (TQFP). ADV is a registered trademark of Analog Devices, Inc. *Speed grades up to 140 MHz are also available upon special request. Please contact Analog Devices or its representatives for further details. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703(V = +5 V 6 5% V = +1.235 V R = 37.5 V, C = 10 pF R = 560 V. AA REF L L SET 1 ADV7120SPECIFICATIONS I connected to I0G. All Specifications T to T unless otherwise noted.) SYNC MIN MAX Parameter All Versions Units Test Conditions/Comments STATIC PERFORMANCE Resolution (Each DAC) 8 Bits Accuracy (Each DAC) Integral Nonlinearity, INL 1 LSB max Differential Nonlinearity, DNL 0.5 LSB max Guaranteed Monotonic Gray Scale Error 5 % Gray Scale max Max Gray Scale Current: IOG = (V * 12,082/R ) mA REF SET IOR, IOB = (V * 8,627/R ) mA REF SET Coding Binary DIGITAL INPUTS Input High Voltage, V 2 V min INH Input Low Voltage, V 0.8 V max INL Input Current, I 1 A max V = 0.4 V or 2.4 V IN IN 2 Input Capacitance, C 10 pF max IN ANALOG OUTPUTS Gray Scale Current Range 15 mA min 22 mA max Output Current White Level Relative to Blank 17.69 mA min Typically 19.05 mA 20.40 mA max White Level Relative to Black 16.74 mA min Typically 17.62 mA 18.50 mA max Black Level Relative to Blank 0.95 mA min Typically 1.44 mA 1.90 mA max Blank Level on IOR, IOB 0 A min Typically 5 A 50 A max Blank Level on IOG 6.29 mA min Typically 7.62 mA 9.5 mA max Sync Level on IOG 0 A min Typically 5 A 50 A max LSB Size 69.1 A typ DAC to DAC Matching 5 % max Typically 2% Output Compliance, V 1 V min OC +1.4 V max 2 Output Impedance, R 100 k typ OUT 2 Output Capacitance, C 30 pF max I = 0 mA OUT OUT VOLTAGE REFERENCE Voltage Reference Range, V 1.14/1.26 V min/V max V = 1.235 V for Specified Performance REF REF Input Current, I 5 mA typ VREF POWER REQUIREMENTS V 5 V nom AA I 125 mA max Typically 80 mA: 80 MHz Parts AA 100 mA max Typically 70 mA: 50 MHz & 35 MHz Parts Power Supply Rejection Ratio 0.5 %/% max Typically 0.12%/%: f = 1 kHz, COMP = 0.1 F Power Dissipation 625 mW max Typically 400 mW: 80 MHz Parts 500 mW max Typically 350 mW: 50 MHz & 30 MHz Parts DYNAMIC PERFORMANCE 2, 3 Glitch Impulse 50 pV secs typ 2, 3, 4 DAC Noise 200 pV secs typ Analog Output Skew 2 ns max Typically 1 ns NOTES 1 Temperature range (T to T ) 0C to +70C. MIN MIN 2 Sample tested at +25C to ensure compliance. 3 TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and outputs. See timing notes in Figure 1. 4 This includes effects due to clock and data feedthrough as well as RGB analog crosstalk. Specifications subject to change without notice. 2 REV. B