MAX3841 19-2905 Rev 1 3/09 12.5Gbps CML 2 2 Crosspoint Switch General Description Features The MAX3841 is a low-power, 12.5Gbps 2 2 cross- Up to 12.5Gbps Operation point switch IC for high-speed serial data loopback, Less Than 10ps Deterministic Jitter P-P redundancy, and switching applications. The MAX3841 current-mode logic (CML) inputs and outputs have iso- Less Than 0.7ps Random Jitter RMS lated V connections to enable DC-coupled interfaces CC 1.8V, 2.5V, and 3.3V DC-Coupled CML I/O to 1.8V, 2.5V, or 3.3V CML ICs. Fully differential signal paths and Maxims second-generation SiGe technology Independent Output Power-Down provide optimum signal integrity, minimizing jitter, 4mm 4mm Thin QFN Package crosstalk, and signal skew. The MAX3841 is ideal for serial OC-192 and 10GbE optical module, line card, -40C to +85C Operation switch fabric, and similar applications. +3.3V Core Supply The MAX3841 has 150mV minimum differential input P-P sensitivity, and 500mV nominal differential output P-P 215mW Power Consumption (Excluding swing. Unused outputs can be powered down individu- Termination Currents) ally to conserve power. In addition to functioning as a 2 2 switch, the MAX3841 can be configured as a 2:1 Ordering Information multiplexer, 1:2 buffer, or dual 1:1 buffer. The MAX3841 is available in a 4mm 4mm 24-pin thin QFN package, PART TEMP RANGE PIN-PACKAGE and consumes only 215mW with both outputs enabled. MAX3841ETG -40C to +85C 24 Thin QFN-EP* Applications MAX3841ETG+ -40C to +85C 24 Thin QFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. OC-192, 10GbE Switch/Line Cards *EP = Exposed pad. OC-192, 10GbE Optical Modules System Redundancy/Self Test Pin Configuration appears at end of data sheet. Clock Fanout Typical Application Circuit 1.8V 2.5V 3.3V 1.8V 10Gbps 3.3V 2.5V CDR/SERDES V VCC1OUT CC VCC2IN ASIC SDI+ OUT1+ IN2+ SDO+ 10Gbps SDI- OUT1- IN2- SDO- SERIAL OPTICAL MAX3841 IN1+ OUT2+ SDI+ MODULE SDO+ IN1- OUT2- SDI- SDO- 2.5V 1.8V VCC1IN VCC2OUT SEL1 SEL2 ENO1 ENO2 GND LOOPBACK Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim s website at www.maxim-ic.com. EVALUATION KIT AVAILABLE12.5Gbps CML 2 2 Crosspoint Switch ABSOLUTE MAXIMUM RATINGS Supply Voltage, V ..............................................-0.5V to +4.0V Continuous Power Dissipation (T = +85C) CC A CML Supply Voltage (VCC IN, VCC OUT)...........-0.5V to +4.0V 24-Pin Thin QFN (derate 20.8mW/C Continuous Output Current (OUT1, OUT2)...................25mA above +85C).............................................................1352mW CML Input Voltage (IN1, IN2)...........-0.5V to (VCC IN + 0.5V) Operating Temperature Range ...........................-40C to +85C LVCMOS Input Voltage (SEL1, SEL2, Storage Temperature Range .............................-55C to +150C ENO1, ENO2) .........................................-0.5V to (V + 0.5V) Lead Temperature (soldering, 10s) .................................+300C CC Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, VCC IN = +1.71V to V , VCC OUT = +1.71V to V , T = -40C to +85C. Typical values are at V = CC CC CC A CC +3.3V, VCC IN = VCC OUT = 1.8V, T = +25C, unless otherwise noted.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Core Supply Current I Excluding CML termination currents 65 90 mA CC Data Rate (Note 1) 0 12.5 Gbps CML Input Differential V AC-coupled or DC-coupled (Note 2) 150 1200 mV IN P-P CML Input Common Mode DC-coupled VCC IN - 0.3 VCC IN V CML Input Termination Single ended 42.5 50 57.5 CML Input Return Loss Up to 10GHz 12 dB CML Output Differential V (Note 2) 400 500 600 mV OUT P-P CML Output Termination Single ended 42.5 50 57.5 CML Output Transition Time t , t 20% to 80% (Notes 1, 3) 30 ps R F Deterministic Jitter (Notes 1, 4) 10 ps P-P Random Jitter V = 150mV (Notes 1, 5) 0.3 0.7 ps IN P-P RMS Propagation Delay Any input to output (Note 1) 100 140 ps Channel-to-Channel Skew (Note 1) 12 ps Output Duty-Cycle Skew 50% input duty cycle (Notes 1, 3) 8 ps LVCMOS Input Current I , I -10 +10 A IH IL LVCMOS Input High Voltage V 1.7 V IH LVCMOS Input Low Voltage V 0.7 V IL Note 1: Guaranteed by design and characterization. Note 2: Differential swing is defined as V = (IN +) - (IN -) and V = (OUT +) - (OUT -). See Figure 1. IN OUT Note 3: Measured using a 0000011111 pattern at 12.5Gbps, and V = 400mV differential. IN P-P 7 7 Note 4: Measured at 9.953Gbps using a pattern of 100 ones, 2 - 1 PRBS, 100 zeros, 2 - 1 PRBS, and at 12.5Gbps using a K28.5 pattern. VCC IN = VCC OUT = 1.8V, and V = 400mV differential. IN P-P Note 5: Refer to Application Note 1181: HFAN-04.5.1: Measuring Random Jitter on a Digital Sampling Oscilloscope. 2 MAX3841