MAX4895E 19-4569 Rev 1 6/10 VGA Port Protector General Description Features The MAX4895E integrates level-translating buffers and ESD Protection on H1, V1, SDA1, SCL1, R, G, and B features R, G, B port protection for VGA signals. 15kVHuman Body Model The MAX4895E has H, V (horizontal, vertical) translat- 8kVIEC 61000-4-2, Contact Discharge ing buffers that take low-level CMOS inputs from the graphics outputs to meet full +5.0V, TTL-compatible Low Quiescent Current, I 5A (max) Q outputs. Each output can drive 10mA and meet the VESA specification. In addition, the device takes the Low 3pF (max) Capacitance (R, G, B Ports) +5.0V, direct digital control (DDC) signals and trans- lates them to the lower level required by the graphics DDC Level-Shifting Protection and Isolation device. This level is set by the user by connecting V to L Horizontal Sync, Vertical Sync Level Shifting/ the graphics output supply. The R, G, B terminals pro- tect the graphics output pins against electrostatic dis- Buffering charge (ESD) events. All seven outputs have high-level Input Compatible with V ESD protection. L The MAX4895E is specified over the extended -40C to Output Full +5.0V TTL Compatible (per VESA) +85C temperature range, and is available in a 16-pin, 3mm x 3mm TQFN package. 10mA Drive on Each H, V Terminal Applications Space-Saving, Lead-Free, 16-Pin (3mm x 3mm) TQFN Package Notebook Computers Desktops Ordering Information Servers PART TEMP RANGE PIN-PACKAGE Graphics Cards MAX4895EETE+ -40C to +85C 16 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. VESA is a registered service mark of Video Electronics *EP = Exposed pad. Standards Association Corporation. Typical Operating Circuit +3.3V +5V 1F 1F V V L CC EN VGA OUTPUTS VGA PORT 2 2 MAX4895E H0, V0 H1, V1 2 2 SDA0, SCL0 SDA1, SCL1 R G N.C. B GND Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.VGA Port Protector ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) Continuous Power Dissipation (T = +70C) for multilayer board: A V ........................................................................-0.3V to +6.0V 16-Pin TQFN (derate 20.8mW/C above +70C) .......1667mW CC V .............................................................-0.3V to +(V + 0.3V) Junction-to-Case Thermal Resistance ( ) (Note 1) ......7C/W L CC JC R, G, B, H1, V1, SCL1, SDA1...................-0.3V to +(V + 0.3V) Junction-to-Ambient Thermal Resistance ( ) CC JA EN, H0, V0, SCL0, SDA0 ............................-0.3V to +(V + 0.3V) (Note 1) ........................................................................48C/W L Continuous Current through SDA , SCL .........................30mA Operating Temperature Range ...........................-40C to +85C Continuous Short-Circuit Current H1, V1..........................20mA Junction Temperature......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) .......................................+260C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = +4.5V to +5.5V, V = +2.0V to V , T = T to T , unless otherwise noted. Typical values are at V = +5.0V, CC L CC A MIN MAX CC V = +3.3V, and T = +25C.) (Note 2) L A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SUPPLY OPERATION Supply Voltage V 4.5 5.5 V CC Logic Supply Voltage V V V 2 3.3 5.5 V L L CC V Supply Current I V , V = 0V, V = V 0.5 5.0 A CC CC H0 V0 EN L V Supply Current I V , V = 0V, V = V (no load) 0.5 5.0 A L L H0 V0 EN L RGB CHANNELS R, G, B Capacitance C f = 1MHz, V = 1V (Note 3) 2.2 pF OUT R,G,B P-P R, G, B Leakage V = +5.5V -1 +1 A CC H , V , EN CHANNELS Input Threshold Low V V = +3.0V 0.8 V IL L Input Threshold High V V = +3.6V 2.0 V IH L Input Hysteresis V 100 mV HYST Input Leakage Current I V = +3.3V, V = +5.5V -1 +1 A LEAK L CC Output-Voltage Low V I = 10mA sink, V = +4.5V 0.8 V OL OUT CC Output-Voltage High V I = 10mA source, V = +4.5V 2.4 V OH OUT CC R = 2.2k , C = 10pF, V = +0.8V, L L OL Propagation Delay t 15 ns PD V = +2.4V OH Enable Time t , t 15 ns ON OFF SDA , SCL (DDC) CHANNELS V = +5.5V, I = 10mA, CC SDA, SCL On-Resistance, SDA, SCL R 20 55 ON V = +0.5V SDA, SCL Leakage Current, SDA, SCL I V = 0V -1 +1 A LEAK L 2 MAX4895E