PI3PCIE2415 3.3V PCI Express 2.0, 2-Lane, 2:1 Mux/DeMux Switch Features Description 4 Differential Channel, 2:1 Mux/DeMux Pericom Semiconductors PI3PCIE2415 is an 8 to 4 differential channel multiplexer/demultiplexer switch. This solution can PCI Express 2.0 Performance, 5.0Gbps switch 2 full PCI Express 2.0, lanes to one of two locations. Pinout optimized for placement between two PCIe slots Using a unique design technique, Pericom has been able to Bi-directional operation minimize the impedance of the switch such that the attenuation observed through the switch is negligible. The unique design Low Bit-to-Bit Skew, 5ps max technique also offers a layout targeted for PCI Express signals, Low Crosstalk: -26dB 5 GHz which minimizes the channel to channel skew as well as channel Low Off Isolation: -20dB 5 GHz to channel crosstalk as required by the PCI Express specicfi a- tion. V Operating Range: +3.3V DD ESD Tolerance: 2kV HBM Low channel-to-channel skew, 35ps max Application Packaging (Pb-free & Green): Routing of PCIe 2.0, signals with low signal attenuation. 42-contact, TQFN (ZH42) Block Diagram Pin Description (Top-Side View) AOa + AI + AOa AI BOa + BI + BOa BI 42 41 40 39 + AOb 1 38 GND AI+ AOb 2 37 AOa+ AI- + BOb AOa- 3 36 AOb+ BOb 35 GND 4 AOb- + V COa 5 34 CI + BI+ DD BOa+ COa CI BI- 6 33 + BOa- DOa DI + BOb+ 7 32 DOa V DI 8 31 BOb- DD SEL 9 30 V GND DD + COb GND 10 29 CI+ COb 28 COa+ 11 CI- 12 27 COa- COb+ DOb + V COb- 13 26 DD DOb GND DI+ 14 25 DOa+ 15 24 DI- SEL DOa- 16 23 DOb+ GND 17 22 DOb- 18 19 20 21 Truth Table Function SEL xIy to xOay L xIy to xOby H All trademarks are property of their respective owners. www.pericom.com PS8945B.1 03/20/13 13-0009 1 GND GND V V DD DD GND GND V V DD DDPI3PCIE2415 3.3V PCI Express 2.0, 2-Lane, 2:1 Mux/DeMux Switch Signal Descriptions Pin Number Pin Name Type Description Differential input pair from PCIE signal source. Signal is passed 1, AI+, through to the AOa+, AOa- pin respectively when SEL=0. Signal Differential input 2 AI- is passed through to the AOb+, AOb- pin respectively when SEL = 1. 37, AOa+, Differential pass-through Differential analog pass-through output. Signal from AI+ and AI- 36 AOa- input is passed through AOa+ and AOa- respectively when SEL=0. 3, AOb+, Differential pass-through Differential analog pass-through output. Signal from AI+ and AI- 4 AOb- input is passed through AOa+ and AOa- respectively when SEL=1. Differential input pair from PCIE signal source. Signal is passed 5, BI+, through to the BOa+, BOa- pin respectively when SEL=0. Signal Differential input 6 BI- is passed through to the BOb+, BOb- pin respectively when SEL = 1. 33, BOa+, Differential pass-through Differential analog pass-through output. Signal from BI+ and BI- 32 BOa- input is passed through BOa+ and BOa- respectively when SEL=0. 7, BOb+, Differential pass-through Differential analog pass-through output. Signal from BI+ and BI- 8 BOb- input is passed through BOb+ and BOb- respectively when SEL=1. Differential input pair from PCIE signal source. Signal is passed 10, CI+, Differential input through the COa+, COa- pin respectively When SEL=0. Signal is 11 CI- passed through to the COb+, COb- pin respectively when SEL = 1. 28, COa+, Differential pass-through Differential analog pass-through output. Signal from CI+ and CI- 27 COa- input is passed through COa+, COa- pin respectively when SEL = 0. 12, COb+, Differential pass-through Differential analog pass-through output. Signal from CI+ and CI- 13 COb- input is passed through COb+, COb- pin respectively when SEL = 1. Differential input pair from PCIE signal source. Signal is passed 14, DI+, Differential input through the DOa+, DOa- pin respectively When SEL=0. Signal is 15 DI- passed through to the DOb+, DOb- pin respectively when SEL = 1. 24, DOa+, Differential pass-through Differential analog pass-through output. Signal from DI+ and DI- 23 DOa- input is passed through DOa+, DOa- pin respectively when SEL = 0. 16, DOb+, Differential pass-through Differential analog pass-through output. Signal from DI+ and DI- 17 DOb- input is passed through DOb+, DOb- pin respectively when SEL = 1. 18, 20, 22, 25, 29, GND Ground input Ground 35, 38, 40, 42 3.6V tolerant low-voltage 30 SEL SEL controls the mux through a flow-through latch. single-ended input 9, 19, 21, 26, 31, V Power supply Power, 3.3V 10% DD 34, 39, 41 All trademarks are property of their respective owners. www.pericom.com PS8945B.1 03/20/13 13-0009 2