A product Line of Pb Diodes Incorporated Lead-free Green PI6CG18401 Very Low Power 4-Output PCIe Clock Generator With On-chip Termination Features Description 1.8V supply voltage The PI6CG18401 is an 4-output very low power PCIe Gen1/ Gen2/Gen3/ Gen4 clock generator. It uses 25MHz crystal Crystal/CMOS input: 25 MHz or CMOS reference as an input to generate the 100MHz low 4 differential low power HCSL outputs with on-chip power differential HCSL outputs with on-chip terminations. termination e oTh n-chip termination can save 16 external resistors and make Individual output enable layout easier. An additional buffered reference output is provided Reference CMOS output to serve as a low noise reference for other circuitry. Programmable Slew rate and output amplitude for each output It uses Diodes proprietary PLL design to achieve very low jitter Differential outputs blocked until PLL is locked that meets PCIe Gen1/Gen2/Gen3 requirements. It also provides Selectable 0%, -0.25% or -0.5% spread on differential outputs various options such as different slew rate and amplitude through Strapping pins or SMBus for configuration strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual 3.3V tolerant SMBus interface support boards. The device also supports selectable spread-spectrum op - Very low jitter outputs tions to reduce EMI for various applications. Differential cycle-to-cycle jitter <50ps Differential output-to-output skew <50ps PCIe Gen1/Gen2/Gen3/ Gen4 compliant Block Diagram CMOS REFOUT phase jitter is < 1.5ps RMS REFOUT Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) OE 3:0 Q3 Halogen and Antimony Free. Green Device (Note 3) For automotive applications requiring specic cfi hange control Q2 XTAL IN/CLK (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, OSC PLL XTAL OUT SS Q1 and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. SCLK Q0 SDATA A product Line of Diodes Incorporated PI6CG18401 Pin Configuration 32 31 30 29 28 27 26 25 1 OE2 24 GND XTAL Q2- XTAL IN/CLK 2 23 XTAL OUT 3 22 Q2+ 4 VDDA V 21 DD OSC GND V GNDA DD REFOUT 5 20 Q1- SADR/REFOUT 6 19 GND REFOUT Q1+ 7 18 OE1 GND DIG 8 17 9 10 11 12 13 14 15 16 Pin Description Pin Pin Name Type Description 1 GND XTAL Power Ground for oscillator circuit 2 XTAL IN/CLK Input Crystal input or CMOS reference input 3 XTAL OUT Output Crystal output 4 V OSC Power Power supply for oscillator circuitry, nominal 1.8V DD 5 V REFOUT Power Power supply for buffered CMOS output DD Input/ Latch to select SMBus Address or 1.8V LVCMOS REFOUT. This pin has 6 SADR/REFOUT CMOS Output internal pull-down. 7 GND REFOUT Power Ground for REFOUT 8 GND DIG Power Ground for digital circuitry 9 V DIG Power Power supply for digital circuitry, nominal 1.8V DD 10 SCLK Input CMOS SMBUS clock input, 3.3V tolerant Input/ 11 SDATA CMOS SMBUS Data line, 3.3V tolerant Output Active low input for enabling Q0 pair. This pin has an internal pull-down. 12 OE0 Input CMOS 1 =disable outputs, 0 = enable outputs 13 Q0+ Output HCSL Differential true clock output 14 Q0- Output HCSL Differential complementary clock output 15, 26, 30 GND Power Ground www.diodes.com June 2020 PI6CG18401 22 Diodes Incorporated Document Number DS39948 Rev 2-2 V DD DIG SS SEL TRI PD SCLK SDATA GND OE0 OE3 Q0+ Q3- Q3+ Q0- GND GND V DDO V DDO