PI6LC48P0201 2-Output LVPECL Networking Clock Generator Features Description Two differential LVPECL output pairs e PTh I6LC48P0201 is a 2-output LVPECL synthesizer opti - mized to generate Ethernet reference clock frequencies and is a Selectable crystal oscillator interface or LVCMOS/LVTTL member of Pericoms HiFlex family of high performance clock single-ended clock input solutions. Using a 25MHz crystal, the most popular Ethernet Supports the following output frequencies: 62.5MHz, frequencies can be generated based on the settings of 2 frequen- 125MHz, 156.25MHz cy select pins. RMS phase jitter 156.25MHz, using a 25MHz crystal e PTh I6LC48P0201 uses Pericoms proprietary low phase noise (1.875MHz 20MHz): 0.14ps (typical) PLL technology to achieve ultra low phase jitter, so it is ideal for RMS phase jitter 156.25MHz, using a 25MHz crystal Ethernet interface in all kind of systems. (12kHz 20MHz): 0.3ps (typical) Full 3.3V or 2.5V supply modes Industrial operating temperature Available in lead-free package: 20-TSSOP Applications Networking systems Block Diagram XTAL IN OSC PFD VCO XTAL OUT CLK0 /N CLK0 Ref IN CLK1 M CLK1 IN SEL PLL ByPass N SEL 0:1 M reset www.pericom.com PI6LC48P0201 Rev. D 08/05/15 15-0107 1PI6LC48P0201 2-Output LVPECL Networking Clock Generator Pin Configuration - TSSOP NC 1 20 VDDO VDDO 2 19 CLK1 CLK0 3 18 CLK1 CLK0 4 17 GND M reset 5 16 VDD PLL ByPass IN SEL 6 15 Ref IN NC 7 14 13 XTAL IN VDDA 8 12 XTAL OUT N SEL0 9 11 VDD 10 N SEL1 Pinout Table - TSSOP Pin No. Pin Name I/O Type Description 1, 7 NC No connection 2, 20 VDDO Power - Output Power Supply 3,4 CLK0, CLK0 Output - LVPECL Output clock 0 Master reset. 1, CLK0/CLK1 go to low, CLK0 /CLK1 go to 5 M reset Input Pull-down high 0 outputs are enabled 6 PLL ByPass Input Pull-down PLL bypass select. 0 PLL is enabled, 1 PLL is bypassed 8 VDDA Power - Analog Power Supply 9, 11 N SEL0, N SEL1 Input Pull-down Output frequency select 10, 16 VDD Power - Core Power Supply XTAL OUT, 12, 13 Crystal - Crystal input and output XTAL IN 14 Ref IN Input Pull-down CMOS reference clock input 15 IN SEL Input Pull-down 0 selects Crystal, 1 selects reference input 17 GND Ground - Ground CLK1 , 18, 19 Output - LVPECL Output clock 1 CLK1 www.pericom.com PI6LC48P0201 Rev. D 08/05/15 15-0107 2