PI90LVB024Q Diodes Incorporated

PI90LV024, PI90LVB024 LVDS Dual 2x2 Crosspoint/Repeater Switch Features Description Dual 2x2 Crosspoint/Repeater Switch The PI90LV024 and PI90LVB024 are monolithic dual 2x2 Meets or Exceeds the Requirements of ANSI TIA/ asynchronous crosspoint/repeater switches. The crosspoint func- EIA-644-1995 tion is based on a multiplexer tree architecture. Each 2x2 switch can be considered as a pair of 2:1 multiplexers that share the same Designed for Signaling Rates up to 650 Mbit/s (325 MHz) inputs. The signal path through each switch is fully differential Operates from a 3.3V Supply: 40C to 85C with minimal propagation delay. The signal path is unregistered, Low Voltage Differential Signaling with Output Voltages so no clock is required for the data inputs. The signal line drivers of 350mV into: and receivers use Low Voltage Differential Signaling (LVDS) to 100 load (PI90LV024) achieve signaling rates as high as 650 Mbps. 50 load Bus LVDS Signaling (PI90LVB024) The LVDS standard provides a minimum differential output voltage Accepts 350mV differential inputs magnitude of 247mV into a 100 load and receipt of 100mV signals Wide common mode input range: 0.2V to 2.7V with up to 1V of ground potential difference between a transmitter Output drivers are high impedance when disabled or when and receiver. The PI90LVB024 doubles the output drive current to V 1.5V CC achieve Bus LVDS signaling levels with a 50 load. Inputs are open, short, and terminated fail safe The intended application of these devices is for loop-through and Propagation Delay Time: 3.5ns redundant channel switching for both point-to-point base-band ESD protection is 10kV on bus pins (PI90LV024) and multipoint (PI90LVB024) data transmissions Bus Pins are High Impedance when disabled or with over controlled impedance media. The package pin assignments V less than 1.5V enables easy routing for applications requiring signal feedback. CC TTL Inputs are 5V Tolerant Power Dissipation at 400Mbit/s of 250mW Packaging (Pb-free & Green Available): 28-pin QSOP (Q) 28-pin TSSOP (L) Pin Configuration Block Diagram B 1 28 V 1 CC S /S DE/ DE 0 1 1 2 A Y 1 2 27 1 S Z 0 3 26 1 A/ B Y/ Z 1 1 1 1 DE 4 25 DE 1 2 S Z 1 5 24 2 A 6 23 Y 2 2 A/ B Y/ Z 2 2 2 2 B 7 22 GND 2 GND B 8 21 4 A/ B Y/ Z 3 3 Y 9 20 A 3 3 4 4 Z 10 19 S 4 3 DE 11 18 DE 4 3 Y/ Z A/ B 4 4 4 4 Z 12 17 S 3 2 Y 13 16 A 3 3 DE/4DE S /S 3 2 3 V 14 15 B CC 3 PS8486B 08/19/04 1PI90LV024, PI90LVB024 LVDS Dual 2x2 Crosspoint/Repeater Switch MUX Truth Table Input Output Function S , S S , S Y/ Z - Y/ Z Y/ Z - Y/ Z 3 1 2 0 1 1 3 3 2 2 4 4 0 0 A/ B - A/ B A/ B - A/ B Splitter 1 1 3 3 1 1 3 3 0 1 A/ B - A/ B A/ B - A/ B Splitter 2 2 4 4 2 2 4 4 1 0 A/ B - A/ B A/ B - A/ B Router 1 1 3 3 2 2 4 4 1 1 A/ B - A/ B A/ B - A/ B Router 2 2 4 4 1 1 3 3 Note: 1. Setting nDE to 0 will set Ouput nY/nZ to High Impedance. S /S DE/ DE 1 0 1 2 A/ B Y/ Z 1 1 1 1 Cross Point Router A/ B Y/ Z 2 2 2 2 DE/4DE S /S 3 3 2 Y/ Z 3 3 A/ B Pass Through 3 3 Router Y/ Z A / B 4 4 4 4 Router Options S /S DE/ DE 1 0 1 2 A/ B Y/ Z 1 1 1 1 Splitter A A/ B Y/ Z 2 2 2 2 DE/ DE S /S 3 4 3 2 Y/ Z A/ B 3 3 3 3 Splitter B Y/ Z A/ B 4 4 4 4 Splitter Options Figure 1. Possible Signal Routing PS8486B 08/19/04 2