IDT71256S CMOS Static RAM IDT71256L 256K (32K x 8-Bit) Address access times as fast as 20ns are available with power Features consumption of only 350mW (typ.). The circuit also offers a reduced power High-speed address/chip select time standby mode. When CS goes HIGH, the circuit will automatically go to and Military: 25/35/45/55/70/85/100ns (max.) remain in, a low-power standby mode as long as CS remains HIGH. This Commercial/Industrial: 20/25/35ns (max.) low power only capability provides significant system level power and cooling savings. Low-power operation The low-power (L) version also offers a battery backup data retention Battery Backup operation 2V data retention capability where the circuit typically consumes only 5W when operating Produced with advanced high-performance CMOS off a 2V battery. technology The IDT71256 is packaged in a 28-pin (300 or 600 mil) ceramic DIP, Input and output directly TTL-compatible a 28-pin 300 mil SOJ providing high board level packing densities. Available in standard 28-pin (300 or 600 mil) ceramic DIP, The IDT71256 military RAM is manufactured in compliance with the 28-pin (300 mil) SOJ latest revision of MIL-STD-883, Class B, making it ideally suited to military Military product compliant to MIL-STD-883, Class B temperature applications demanding the highest level of performance and reliability. Description The IDT 71256 is a 262,144-bit high-speed static RAM organized as 32K x 8. It is fabricated using high-performance, high-reliability CMOS technology. Functional Block Diagram A0 VCC GND 262,144 BIT ADDRESS MEMORY ARRAY DECODER A14 I/O0 I/O CONTROL INPUT DATA CIRCUIT I/O7 , CS CONTROL OE CIRCUIT 2946 drw 01 WE SEPTEMBER 2013 1 2013 Integrated Device Technology, Inc. DSC-2946/13IDT71256S/L CMOS Static RAM 256K (32K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges (1) Pin Configurations Truth Table WE CS OE I/O Function 1 VCC A14 28 XH X High-Z Standby (ISB) 2 A12 27 WE 3 A7 26 A13 XVHC X High-Z Standby (ISB1) A6 4 25 A8 H L H High-Z Output Disabled 5 24 A5 A9 A4 6 D28-3 23 A11 HL L DOUT Read Data D28-1 7 22 A3 OE LL X DIN Write Data SO28-5 A2 8 21 A10 9 20 2946 tbl 02 A1 CS NOTE: A0 10 19 I/O7 1. H = VIH, L = VIL, X = Don t care. 11 18 I/O0 I/O6 I/O1 12 17 I/O5 13 I/O2 16 I/O4 14 GND 15 I/O3 (1) 2946 drw 02 Absolute Maximum Ratings Symbol Rating Com l. Ind. Mil. Unit DIP/SOJ VTERM Terminal Voltage -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 V Top View with Respect to GND o TA Operating 0 to +70 -40 to +85 -55 to +125 C Temperature Pin Descriptions o TBIAS Temperature -55 to +125 -55 to +125 -65 to +135 C Name Description Under Bias A0 - A14 Address Inputs Storage o TSTG -55 to +125 -55 to +125 -65 to +150 C Temperature I/O0 - I/O7 Data Input/Output Power CS Chip Select PT 1.0 1.0 1.0 W Dissipation WE Write Enable IOUT DC Output Current 50 50 50 mA Output Enable 2946 tbl 03 OE NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS GND Ground may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those VCC Power indicated in the operational sections of this specification is not implied. Exposure 2946 tbl 01 to absolute maximum rating conditions for extended periods may affect reliability. Capacitance (TA = +25C, f = 1.0MHz) (1) Symbol Parameter Conditions Max. Unit CIN Input Capacitance VIN = 0V 11 pF CI/O I/O Capacitance VOUT = 0V 11 pF 2946 tbl 04 NOTE: 1. This parameter is determined by device characterization, but is not production tested. 2