MR25H256CDC Everspin

MR25H256 / MR25H256A 256Kb Serial SPI MRAM FEATURES No write delays Unlimited write endurance Data retention greater than 20 years Automatic data protection on power loss Block write protection 8-DFN Fast, simple SPI interface with up to 40 MHz clock rate 2.7 to 3.6 Volt power supply range Low current sleep mode Industrial and Automotive Grade 1 and Grade 3 tempera- tures Available in 8-DFN or 8-DFN Small Flag RoHS-compliant Small Flag 8-DFN package. Direct replacement for serial EEPROM, Flash, FeRAM Industrial Grade and AEC-Q100 Grade 1 and Grade 3 options RoHS Moisture Sensitivity MSL-3 Product Versions and Options MR25H256A has been released for mass production and is recommended for all new designs. MR25H256 remains in mass production but will be subject to eventual phase out and end of life and is not recommended for new designs.Both versions have the same specifications. MR25H256A Product Options Grade Temperature Package Industrial -40 to +85 C 8-DFN Small Flag Automotive AEC-Q100 Grade 3 -40 to +85 C 8-DFN Small Flag Automotive AEC-Q100 Grade 1 -40 to +125 C 8-DFN Small Flag MR25H256 Product Options (Not recommended for new designs) Grade Temperature Package 8-DFN Small Flag Industrial -40 to +85 C 8-DFN 8-DFN Small Flag Automotive AEC-Q100 Grade 1 -40 to +125 C 8-DFN MR25H256 / MR25H256A Rev. 1.5 3/2018 Copyright 2018 Everspin Technologies 1MR25H256 / MR25H256A TABLE OF CONTENTS OVERVIEW ............................................................................................................................................4 Figure 1 Block Diagram ........................................................................................................................................... 4 System Configuration .....................................................................................................................4 Figure 2 System Configuration ............................................................................................................................. 4 DEVICE PIN ASSIGNMENT ...................................................................................................................5 Figure 3 Pin Diagram All 8-DFN Packages ........................................................................................................ 5 Table 1 Pin Functions All 8-DFN Packages ....................................................................................................... 5 SPI COMMUNICATIONS PROTOCOL ...................................................................................................6 Table 2 Command Codes ....................................................................................................................................... 6 Status Register and Block Write Protection ..................................................................................6 Table 3 Status Register Bit Assignments ........................................................................................................... 6 Table 4 Block Memory Write Protection ............................................................................................................ 7 Table 5 Memory Protection Modes .................................................................................................................... 7 Read Status Register (RDSR) ...........................................................................................................7 Figure 4 RDSR ............................................................................................................................................................. 7 Write Enable (WREN) .......................................................................................................................8 Figure 5 WREN ............................................................................................................................................................ 8 Write Disable (WRDI) .......................................................................................................................8 Figure 6 WRDI ............................................................................................................................................................. 8 Write Status Register (WRSR) .........................................................................................................9 Figure 7 WRSR ............................................................................................................................................................. 9 Read Data Bytes (READ) ............................................................................................................... 10 Figure 8 READ ...........................................................................................................................................................10 Write Data Bytes (WRITE) ............................................................................................................. 11 Figure 9 WRITE ..........................................................................................................................................................11 Enter Sleep Mode (SLEEP) ............................................................................................................ 12 Figure 10 SLEEP ........................................................................................................................................................12 MR25H256 / MR25H256A Rev. 1.5 3/2018 Copyright 2018 Everspin Technologies 2