PSoC 4: PSoC 4200 Family Datasheet Programmable System-on-Chip (PSoC ) General Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system controllers with an ARM Cortex-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200 product family, based on this platform, is a combination of a microcontroller with digital program- mable logic, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing peripherals. The PSoC 4200 products will be fully upward compatible with members of the PSoC 4 platform for new applications and design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design. Features 32-bit MCU Sub-system Serial Communication 48-MHz ARM Cortex-M0 CPU with single cycle multiply Two independent run-time reconfigurable serial communi- 2 cation blocks (SCBs) with reconfigurable I C, SPI, or UART Up to 32 kB of flash with Read Accelerator functionality Up to 4 kB of SRAM Timing and Pulse-Width Modulation Programmable Analog Four 16-bit timer/counter pulse-width modulator (TCPWM) Two opamps with reconfigurable high-drive external and blocks high-bandwidth internal drive, Comparator modes, and ADC input buffering capability Center-aligned, Edge, and Pseudo-random modes 12-bit, 1-Msps SAR ADC with differential and single-ended Comparator-based triggering of Kill signals for motor drive and modes Channel Sequencer with signal averaging other high-reliability digital logic applications Two current DACs (IDACs) for general-purpose or capacitive Up to 36 Programmable GPIOs sensing applications on any pin Two low-power comparators that operate in Deep Sleep mode Any GPIO pin can be CapSense, LCD, analog, or digital Drive modes, strengths, and slew rates are programmable Programmable Digital Four programmable logic blocks called universal digital blocks, Five different packages (UDBs), each with 8 Macrocells and data path 48-pin TQFP, 44-pin TQFP, 40-pin QFN, 35-ball WLCSP, and Cypress-provided peripheral component library, user-defined 28-pin SSOP package state machines, and Verilog input 2 35-ball WLCSP package is shipped with I C Bootloader in Flash Low Power 1.71-V to 5.5-V Operation 20-nA Stop Mode with GPIO pin wakeup PSoC Creator Design Environment Hibernate and Deep Sleep modes allow wakeup-time versus Integrated Development Environment (IDE) provides power trade-offs schematic design entry and build (with analog and digital automatic routing) Capacitive Sensing Applications Programming Interface (API) component for all Cypress CapSense Sigma-Delta (CSD) provides best-in-class fixed-function and programmable peripherals SNR (>5:1) and water tolerance Industry-Standard Tool Compatibility Cypress-supplied software component makes capacitive sensing design easy After schematic entry, development can be done with ARM-based industry-standard development tools Automatic hardware tuning (SmartSense) Segment LCD Drive LCD drive supported on all pins (common or segment) Operates in Deep Sleep mode with 4 bits per pin memory Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-87197 Rev. *E Revised April 29, 2015 PSoC 4: PSoC 4200 Family Datasheet More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article KBA86521, How to Design with PSoC 3, PSoC 4, and PSoC 5LP. Following is an abbreviated list for PSoC 4: Overview: PSoC Portfolio, PSoC Roadmap Technical Reference Manual (TRM) is in two documents: Architecture TRM details each PSoC 4 functional block. Product Selectors: PSoC 1, PSoC 3, PSoC 4, PSoC 5LP In addition, PSoC Creator includes a device selection tool. Registers TRM describes each of the PSoC 4 registers. Application notes: Cypress offers a large number of PSoC Development Kits: application notes covering a broad range of topics, from basic CY8CKIT-042, PSoC 4 Pioneer Kit, is an easy-to-use and to advanced level. Recommended application notes for getting inexpensive development platform. This kit includes started with PSoC 4 are: connectors for Arduino compatible shields and Digilent Pmod daughter cards. AN79953: Getting Started With PSoC 4 CY8CKIT-049 is a very low-cost prototyping platform. It is a AN88619: PSoC 4 Hardware Design Considerations low-cost alternative to sampling PSoC 4 devices. AN86439: Using PSoC 4 GPIO Pins CY8CKIT-001 is a common development platform for any AN57821: Mixed Signal Circuit Board Layout one of the PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP families AN81623: Digital Design Best Practices of devices. AN73854: Introduction To Bootloaders The MiniProg3 device provides an interface for flash AN89610: ARM Cortex Code Optimization programming and debug. PSoC Creator PSoC Creator is a free Windows-based Integrated Design Environment (IDE). It enables concurrent hardware and firmware design of PSoC 3, PSoC 4, and PSoC 5LP based systems. Create designs using classic, familiar schematic capture supported by over 100 pre-verified, production-ready PSoC Components see the list of component datasheets. With PSoC Creator, you can: 1. Drag and drop component icons to build your hardware 3. Configure components using the configuration tools system design in the main design workspace 4. Explore the library of 100+ components 2. Codesign your application firmware with the PSoC hardware, 5. Review component datasheets using the PSoC Creator IDE C compiler Figure 1. Multiple-Sensor Example Project in PSoC Creator 1 2 3 4 5 Document Number: 001-87197 Rev. *E Page 2 of 46