CY15B104QSN PRELIMINARY CY15V104QSN Excelon-Ultra 4-Mbit (512K 8) Quad SPI F-RAM Excelon-Ultra 4-Mbit (512K 8) Quad SPI F-RAM Operating temperature: 40 C to +85 C Features Packages 4-Mbit ferroelectric random access memory (F-RAM) logically 8-pin Small Outline Integrated Circuit (SOIC) package organized as 512K 8 14 8-pin Grid-Array Quad Flat No-Lead (GQFN) package Virtually unlimited endurance of 100 trillion (10 ) read/write cycles Restriction of hazardous substances (RoHS) compliant 151-year data retention (See Data Retention and Endurance Functional Description on page 81) NoDelay writes The Excelon-Ultra CY15x104QSN is a high-performance, 4-Mbit Advanced high-reliability ferroelectric process nonvolatile memory employing an advanced ferroelectric Single and multi I/O serial peripheral interface (SPI) process. A ferroelectric random access memory or F-RAM is nonvolatile and performs reads and writes similar to a RAM. It Serial bus interface SPI protocols provides reliable data retention for 151 years while eliminating Supports SPI mode 0 (0, 0) and mode 3 (1, 1) for all SDR the complexities, overhead, and system-level reliability problems mode transfers caused by serial flash and other nonvolatile memories. Supports SPI mode 0 (0, 0) for all DDR mode transfers Extended I/O SPI protocols Unlike serial flash, the CY15x104QSN performs write operations at bus speed. No write delays are incurred. Data is written to the Dual SPI (DPI) protocols memory array immediately after each byte is successfully Quad SPI (QPI) protocols transferred to the device. The next bus cycle can commence SPI clock frequency without the need for data polling. In addition, the product offers Up to 108-MHz frequency SPI Single Data Rate (SDR) substantial write endurance compared to other nonvolatile 14 Up to 54-MHz frequency SPI Double Data Rate (DDR) memories. The CY15x104QSN is capable of supporting 10 read/write cycles, or 100 million times more write cycles than Execute-in-place (XIP) for memory read/write EEPROM. These capabilities make the CY15x104QSN ideal for nonvolatile memory applications, requiring frequent or rapid Write protection, data security, and data integrity writes. Examples range from data collection, where the number Hardware protection using the Write Protect (WP) pin of write cycles may be critical, to demanding industrial controls where the long write time of serial flash can cause data loss. Software block protection The CY15x104QSN combines a 4-Mbit F-RAM with the Embedded error correction code (ECC) and cyclic redundancy high-speed Quad SPI (QPI) SDR and DDR interfaces which check (CRC) for enhanced data integrity enhances the nonvolatile write capability of F-RAM technology. ECC detects and corrects 1-bit error. If a 2-bit error occurs, The device incorporates a read-only Device ID and Unique ID it does not correct but reports through the ECC Status register features which allow the SPI bus master to determine the CRC detects any accidental change to raw data manufacturer, product density, product revision and unique ID for each part. The device is also offered with a unique serial number Extended electronic signatures that is read-only and can be used to identify a board or a system. Device ID includes manufacturer ID and product ID The device supports on-die ECC logic which can detect and Unique ID correct 1-bit error in every 8-byte unit data. The device also User programmable Serial Number extends capability to report 2-bit error in 8-byte unit data. The Dedicated 256-byte special sector F-RAM CY15x104QSN also supports the Cyclic Redundancy Check (CRC) feature which can be used to check the data integrity of Dedicated special sector write and read the stored data in the memory array. Content can survive up to three standard reflow cycles For a complete list of related resources, click here. Low-power consumption at high speed 10 mA (typ) active current for 108 MHz SPI SDR 16 mA (typ) active current for 108 MHz QSPI SDR and 54-MHz QSPI DDR 102 A (typ) standby current 0.80 A (typ) deep power down mode current 0.1 A (typ) hibernate mode current Low-voltage operation: CY15V104QSN: V = 1.71 V to 1.89 V DD CY15B104QSN: V = 1.8 V to 3.6 V DD Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-18293 Rev. *G Revised July 30, 2018CY15B104QSN PRELIMINARY CY15V104QSN Logic Block Diagram V DD Power Control Block 256-Byte SI (I/O0) Special Sector F-RAM SO (I/O1) Instruction Decoder F-RAM & Nonvolatile SPI Control Logic WP (I/O2) Registers Access 512K x 8 Reset Logic Control F-RAM Array RESET (I/O3) Write Protect CS Status Registers SCK Configuration Registers Device ID Serial Number Registers Unique ID Document Number: 002-18293 Rev. *G Page 2 of 98