CY22392 Three-PLL General Purpose Flash-Programmable Clock Generator Three-PLL General Purpose Flash-Programmable Clock Generator Improves frequency accuracy over temperature, age, process, Features and initial offset. Three Integrated Phase-locked Loops Nonvolatile programming enables easy customization, fast turnaround, performance tweaking, design timing margin Ultra Wide Divide Counters (8-bit Q, 11-bit P, and 7-bit Post testing, inventory control, lower part count, and more secure Divide) product supply. In addition, any part in the family can also be Improved Linear Crystal Load Capacitors programmed multiple times, which reduces programming errors and provides an easy upgrade path for existing designs. Flash Programmability In-house programming of samples and prototype quantities is Field-Programmable available using the CY3672 development kit. Production Low-jitter, High-accuracy Outputs quantities are available through Cypress Semiconductors value added distribution partners or by using third party Power Management Options (Shutdown, OE, Suspend) programmers from BP Microsystems, HiLo Systems, and others. Configurable Crystal Drive Strength Performance suitable for high-end multimedia, Frequency Select through three External LVTTL Inputs communications, industrial, A/D Converters, and consumer 3.3 V Operation applications. 16-pin TSSOP and SOIC Packages Supports numerous low power application schemes and reduces EMI by enabling unused outputs to be turned off. CyClocksRT Support Adjusts crystal drive strength for compatibility with virtually all Benefits crystals.3-bit external frequency select options for PLL1, CLKA, and CLKB. Generates up to three unique frequencies on six outputs up to 200 MHz from an external source. Functional upgrade for Industry-standard supply voltage.Industry-standard packaging current CY2292 family. saves on board space.Easy to use software support for design entry. Enables 0 ppm frequency generation and frequency conversion under the most demanding applications. Functional Description For a complete list of related documentation, click here. Logic Block Diagram XTALIN OSC. XBUF XTALOUT CONFIGURATION FLASH PLL1 Divider CLKE 11 BIT P /2,3, or 4 8 BIT Q SHUTDOWN/OE S0 PLL2 Divider CLKD 4x4 7 BIT S1 11 BIT P Crosspoint 8 BIT Q Switch S2/SUSPEND Divider PLL3 CLKC 7 BIT 11 BIT P 8 BIT Q Divider CLKB 7 BIT Divider CLKA 7 BIT Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07013 Rev. *M Revised February 2, 2018CY22392 Contents Pin Configurations ...........................................................3 Test Circuit ........................................................................ 7 Pin Definitions ..................................................................3 Ordering Information ........................................................ 8 Operation ...........................................................................4 Possible Configurations ............................................... 8 Configurable PLLs .......................................................4 Ordering Code Definitions ........................................... 9 General Purpose Inputs ..............................................4 Package Diagrams .......................................................... 10 Crystal Input ................................................................4 Acronyms ........................................................................ 11 Output Configuration ...................................................4 Document Conventions ................................................. 11 Power Saving Features ...............................................4 Units of Measure ....................................................... 11 Improving Jitter ............................................................5 Document History Page ................................................. 12 Power Supply Sequencing ..........................................5 Sales, Solutions, and Legal Information ...................... 14 CyberClocks Software ..................................................5 Worldwide Sales and Design Support ....................... 14 Device Programming ........................................................5 Products .................................................................... 14 Junction Temperature Limitations ..................................5 PSoCSolutions ....................................................... 14 Maximum Ratings .............................................................5 Cypress Developer Community ................................. 14 Operating Conditions .......................................................5 Technical Support ..................................................... 14 Electrical Characteristics .................................................6 Switching Characteristics ................................................6 Switching Waveforms ......................................................7 Document Number: 38-07013 Rev. *M Page 2 of 14