CY2300 Phase-Aligned Clock Multiplier Phase-Aligned Clock Multiplier Features Functional Description 4-multiplier configuration The CY2300 is a 4 output 3.3 V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, Single PLL architecture datacom, telecom, and other high-performance applications. Phase alignment The part allows the user to obtain 1/2x, 1x, 1x and 2x REFIN output frequencies on respective output pins. Low jitter, high accuracy outputs The part has an on-chip PLL which locks to an input clock Output enable pin presented on the REFIN pin. The input-to-output skew is guaranteed to be less than 200 ps, and output-to-output skew 3.3 V operation is guaranteed to be less than 200 ps. 5 V tolerant input Multiple CY2300 devices can accept the same input clock and Internal loop filter distribute it in a system. In this case, the skew between the outputs of two devices is guaranteed to be less than 400 ps. 8-pin 150-mil small-outline integrated circuit (SOIC) package The CY2300 is available in commercial temperature range. Commercial temperature Logic Block Diagram FBK 1/2xREF PLL REFIN /2 REF Divider Logic REF 2xREF OE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07252 Rev. *F Revised March 28, 2014 CY2300 Contents Pinouts ..............................................................................3 Document Conventions ................................................... 9 Pin Definitions ..................................................................3 Units of Measure ......................................................... 9 Maximum Ratings .............................................................4 Errata ...............................................................................10 Operating Conditions .......................................................4 Part Numbers Affected .............................................. 10 Electrical Characteristics .................................................4 CY2300 Errata Summary .......................................... 10 Switching Characteristics ................................................5 CY2300 Qualification Status of fixed silicon .............. 10 Switching Waveforms ......................................................6 Document History Page ................................................. 12 Test Circuits ......................................................................7 Sales, Solutions, and Legal Information ...................... 13 Ordering Information ........................................................7 Worldwide Sales and Design Support ....................... 13 Ordering Code Definitions ...........................................7 Products ....................................................................13 Package Drawing and Dimensions .................................8 PSoC Solutions ...................................................... 13 Reference Documents ......................................................9 Cypress Developer Community ................................. 13 Acronyms ..........................................................................9 Technical Support ..................................................... 13 Document Number: 38-07252 Rev. *F Page 2 of 13