CY29350 2.5 V or 3.3 V, 200-MHz, 9-Output Clock Driver 2.5 V or 3.3 V, 200-MHz, 9-Output Clock Driver Features Functional Description Output frequency range: 25 MHz to 200 MHz The CY29350 is a low-voltage high-performance 200-MHz PLL-based clock driver designed for high speed clock Input frequency range: 6.25 MHz to 31.25 MHz distribution applications. 2.5 V or 3.3 V operation The CY29350 features Xtal and LVCMOS reference clock inputs and provides nine outputs partitioned in four banks of 1, 1, 2, and Split 2.5 V/3.3 V outputs 5 outputs. Bank A divides the VCO output by 2 or 4 while the 2.5% max Output duty cycle variation other banks divide by 4 or 8 per SEL(A:D) settings, see Function Table on page 4. These dividers allow output to input ratios of Nine Clock outputs: Drive up to 18 clock lines 16:1, 8:1, 4:1, and 2:1. Each LVCMOS compatible output can drive 50 series or parallel terminated transmission lines. For Two reference clock inputs: Xtal or LVCMOS series terminated transmission lines, each output can drive one 150-ps max output-output skew or two traces giving the device an effective fanout of 1:18. Phase-locked loop (PLL) bypass mode The PLL is ensured stable given that the VCO is configured to run between 200 MHz to 500 MHz. This allows a wide range of Spread Aware output frequencies from 25 MHz to 200 MHz. The internal VCO is running at multiples of the input reference clock set by the Output enable/disable feedback divider, see Frequency Table on page 4. Pin-compatible with MPC9350 When PLL EN is LOW, PLL is bypassed and the reference clock Industrial temperature range: 40 C to +85 C directly feeds the output dividers. This mode is fully static and the minimum input clock frequency specification does not apply. 32-pin 1.0 mm TQFP package Block Diagram SELA PLL EN REF SEL TCLK VCO Phase QA XIN 200 - OSC Detector XOUT 500MHz QB LPF FB SEL QC0 SELB QC1 SELC QD0 QD1 SELD QD2 QD3 QD4 OE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07474 Rev. *D Revised April 15, 2014CY29350 Contents Pin Configuration .............................................................3 Package Drawing and Dimension ................................. 11 Pin Definitions ..................................................................4 Acronyms ........................................................................12 Frequency Table ...............................................................4 Document Conventions ................................................. 12 Function Table ..................................................................4 Units of Measure ....................................................... 12 Absolute Maximum Conditions .......................................5 Document History Page ................................................. 13 DC Electrical Specifications ............................................6 Sales, Solutions, and Legal Information ...................... 14 DC Electrical Specifications ............................................6 Worldwide Sales and Design Support ....................... 14 AC Electrical Specifications ............................................7 Products ....................................................................14 AC Electrical Specifications ............................................8 PSoC Solutions ...................................................... 14 AC Test Loads ..................................................................9 Cypress Developer Community ................................. 14 Switching Waveforms ......................................................9 Technical Support ..................................................... 14 Suggested Oscillator Crystal Parameters ......................9 Ordering Information ......................................................10 Ordering Code Definitions .........................................10 Document Number: 38-07474 Rev. *D Page 2 of 14