CY8CLED08 EZ-Color HB LED Controller Features HB LED Controller Advanced Peripherals (PSoC Blocks) Configurable Dimmers Support up to Eight Eight Digital PSoC Blocks Provide: Independent LED Channels 8 to 32-Bit Timers, Counters, and PWMs 8 to 32 Bits of Resolution per Channel Up to Two Full-Duplex UARTs Dynamic Reconfiguration Enables LED Controller Plus Other Multiple SPI Masters or Slaves Features: CapSense, Battery Charging, and Motor Control Connectable to all GPIO pins Visual Embedded Design 12 Rail-to-Rail Analog PSoC Blocks Provide: LED-Based Drivers Up to 14-Bit ADCs Binning Compensation Up to 9-Bit DACs Temperature Feedback Programmable Gain Amplifiers Optical Feedback Programmable Filters and Comparators DMX512 Complex peripherals by Combining Blocks PrISM Modulation Technology Programmable Pin Configurations Reduces Radiated EMI 25 mA Sink, 10 mA Source on all GPIO Reduces Low Frequency Blinking Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on all GPIO Powerful Harvard Architecture Processor Up to 12 Analog Inputs on GPIO M8C Processor Speeds to 24 MHz Four 30 mA Analog Outputs on GPIO 3.0 to 5.25V Operating Voltage Configurable interrupt on all GPIO Operating Voltages Down to 1.0V using On-Chip Switch Mode Pump (SMP) Complete Development Tools Industrial Temperature Range: -40C to +85C Free Development Software PSoC Designer Flexible On-Chip Memory Full Featured, In-Circuit Emulator and Programmer 16K Flash Program Storage 50,000 Erase/Write Cycles Full Speed Emulation 256 bytes SRAM Data Storage Complex Breakpoint Structure In-System Serial Programming (ISSP) 128 KBytes Trace Memory Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-12981 Rev. *E Revised January 15, 2010 + Feedback CY8CLED08 Logic Block Diagram Analog Port 5 Port 4 Port 3 Port 2 Port 1 Port 0 Drivers PSoC CORE System Bus Global Digital Interconnect Global Analog Interconnect SRAM SROM Flash 16K 256 Bytes CPU Core (M8C) Sleep and Interrupt Watchdog Controller Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO) DIGITAL SYSTEM ANALOG SYSTEM Analog Ref. Digital Analog Block Block Array Array Analog Input Muxing POR and LVD Internal Switch Digital Multiply Decimator I2 C Voltage Mode Clocks Accum. System Resets Ref. Pump SYSTEM RESOURCES Document Number: 001-12981 Rev. *E Page 2 of 44 + Feedback