IR3541 Digital Multi-Phase Buck Controller CHL8325A/B FEATURES DESCRIPTION 5-phase dual output PWM Controller The IR3541 and CHL8325A/B are dual-loop digital multi-phase buck controllers that drive up to 5 phases. Phases are flexibly assigned between Loops 1 & 2 The IR3541 and CHL8325A/B are fully Intel VR12 and AMD Intel VR12, AMD 400kHz & 3.4MHz SVI and SVI compliant on both loops and provides a Vtt tracking Memory modes function for DDR memory. Dual OCP support for I-spike enhanced AMD CPUs NVM storage saves pins and enables a small package size. SMB Alert Pin for Servers PMBus Address pin or Variable Gate Drive The IR3541 and CHL8325A/B include the IR Efficiency (IR3541/CHL8325A) Shaping Technology to deliver exceptional efficiency at nd minimum cost across the entire load range. IR Variable Gate 2 Temperature Sense for VR12 Desktop Drive optimizes the MOSFET gate drive voltage as a function (CHL8325B) of real-time load current. IR Dynamic Phase Control Overclocking & Gaming Mode with Vmax setting adds/drops active phases based upon load current. Switching frequency from 200kHz to 1.2MHz per The IR3541 and CHL8325A/B can be configured to enter phase 1-phase operation and active diode emulation mode automatically or by command. IR Efficiency Shaping Features including Variable Gate Drive (IR3541/CHL8325A only) and Dynamic IRs unique Adaptive Transient Algorithm (ATA), based on Phase Control proprietary non-linear digital PWM algorithms, minimizes Programmable 1-phase or 2-phase for Light Loads output bulk capacitors. and Active Diode Emulation for Very Light Loads IR Adaptive Transient Algorithm (ATA) on both The I2C/PMBus interface can communicate with up to 16 loops minimizes output bulk capacitors and IR3541 and CHL8325A/B based VR loops. Device system cost configuration and fault parameters are easily defined using the IR Intuitive Power Designer (DPDC) GUI and stored in Auto-Phase Detection with auto-compensation on-chip NVM. Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP The IR3541 and CHL8325A/B also include numerous I2C/SMBus/PMBus system interface for telemetry features like register diagnostics for fast design cycles and of Temperature, Voltage, Current & Power for platform differentiation, truly simplifying VRD design and both loops enabling fastest time-to-market with its set-and-forget methodology. Non-Volatile Memory (NVM) for custom configuration Compatible with IR ATL and 3.3V Tri-state Drivers PIN DIAGRAM +3.3V supply voltage -20C to 85C ambient operation Pb-Free, RoHS, 6x6 40-pin QFN, MSL2 package APPLICATIONS Intel VR12 & AMD SVI based systems DDR Memory with Vtt tracking Overclocked & Gaming platforms Figure 1: IR3541 Package Top View 1 June 21, 2013 FINAL V1.09 IR3541 Digital Multi-Phase Buck Controller CHL8325A/B ORDERING INFORMATION Packing Package Part Number Programming Qty IR3541M TR=3000 IR3541MTRPBF QFN Default TY=4900 IR3541MTYPBF P/PBF Lead Free Customer 1 QFN TR=3000 IR3541MxxyyTRP Configuration TR Tape & Reel / TY - Tray Notes: 1. Customer Specific Configuration File, where yy Configuration File ID xx = Customer ID and yy = Configuration File xx Customer ID (Codes assigned by IR Marketing). Package Type (QFN) Package Packing Qty Part Number T=3000 CHL8325A-00CRT QFN TY=4900 CHL8325A-00CRTY 1 CHL8325 QFN T=3000 CHL8325A-xxCRT T=3000 CHL8325B-00CRT QFN TY=4900 CHL8325B-00CRTY 1 T Tape & Reel / TY - Tray QFN T=3000 CHL8325B-xxCRT R Package Type (QFN) Notes: C Operating Temperature, 1. xx indicates a customer specific configuration Commercial file. xx Configuration File Part A: CHL8325A B: CHL8328B 40 39 38 37 36 35 34 33 32 31 1 30 RCSP RCSP L2 RCSM 2 29 RCSM L2 3 28 VCC VCC 4 27 VSEN VSEN L2 CHL8325A/B VRTN 5 26 VRTN L2 40 Pin 6x6 QFN 6 25 PWM5 RRES Top View TSEN 7 24 PWM4 8 23 PWM3 V18A 1 VR READY L1 / PWM2 9 22 2 Notes PWRGD 1 Pin definition in Intel & MPoL modes 41 GND 2 1 Pin definition in AMD mode VR READY L2 2 10 21 PWM1 / PWROK 11 12 13 14 15 16 17 18 19 20 Figure 2: IR3541 Package Top View, Enlarged Figure 3: CHL8325A/B Package Top View, Enlarged 2 June 21, 2013 FINAL V1.09 VINSEN IRTN1 1 2 SV ALERT / VFIXEN ISEN1 1 2 SV CLK / SVC IRTN2 1 2 SV DIO / SVD ISEN2 1 VR HOT / IRTN3 2 VRHOT ICRIT ISEN3 ENABLE SMB ALERT IRTN4 ISEN4 SMB DIO SMB CLK IRTN5 VAR GATE PM ADDR (CHL8325A) ISEN5 TSEN2 (CHL8325B)