FUJITSU SEMICONDUCTOR DS07-13730-3E DATA SHEET 16-bit Proprietary Microcontroller CMOS 2 F MC-16LX MB90340 Series MB90F342A(S), MB90F342CA(S), MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S), MB90V340A-101/102 n DESCRIPTION The MB90340-series with up to 2 FULL-CAN* interfaces and FLASH ROM is especially designed for automotive and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach. With the new 0.35 m m CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory up to 512 Kbytes. The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock. The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free running timers. 4 UARTs constitute additional functionality for communication purposes. * : Controller Area Network (CAN) - License of Robert Bosch GmbH 2 Note : F MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED. n PACKAGES 100-pin Plastic QFP 100-pin Plastic LQFP (FPT-100P-M06) (FPT-100P-M05) MB90340 Series n FEATURES Clock Built-in PLL clock frequency multiplication circuit Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz). Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed. (devices without S- suffix only) Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multi- plied PLL clock). Built-in Clock Modulation circuit 16 Mbyte CPU memory space 24-bit internal addressing Instruction system best suited to controller Wide choice of data types (bit, byte, word, and long word) Wide choice of addressing modes(23 types) Enhanced multiply-divide instructions and RETI instructions Enhanced high-precision computing with 32-bit accumulator Instruction system compatible with high-level language (C language) and multitask Employing system stack pointer Enhanced various pointer indirect instructions Barrel shift instructions Increased processing speed 4-byte instruction queue Powerful interrupt function Powerful 8-level, 34-condition interrupt feature Up to 16 external interrupts are supported Automatic data transfer function independent of CPU 2 Expanded intelligent I/O service function (EI OS) : up to 16 channels DMA : up to 16 channels Low power consumption (standby) mode Sleep mode (a mode that halts CPU operating clock) Main timer mode (time-base timer mode that is transfered from main clock mode) PLL timer mode (time-base timer mode that is transfered from PLL clock mode) Watch mode (a mode that operates sub clock and clock timer only) Stop mode (a mode that stops oscillation clock and sub clock) CPU blocking operation mode Process CMOS technology I/O port General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix) (Continued) 2