MB96310 Series 2 F MC-16FX 16-bit Proprietary Microcontroller MB96310 series is based on Cypress advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the same operation frequency, reduced power consumption and faster start-up time. For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 56MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 17.8ns going together with excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to select suitable operation frequencies for peripheral resources independent of the CPU speed. Features Technology Code Security 0.18m CMOS Protects ROM content from unintended read-out CPU Memory Patch Function 2 F MC-16FX CPU Replaces ROM content Up to 56 MHz internal, 17.8 ns instruction cycle time Can also be used to implement embedded debug support Optimized instruction set for controller applications (bit, byte, DMA word and long-word data types 23 different addressing modes Automatic transfer function independent of CPU, can be barrel shift variety of pointers) assigned freely to resources 8-byte instruction execution queue Interrupts Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit) instructions available Fast Interrupt processing 8 programmable priority levels System clock Non-Maskable Interrupt (NMI) On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop) 3 MHz - 16 MHz external crystal oscillator clock (maximum Timers frequency when using ceramic resonator depends on Three independent clock timers (23-bit RC clock timer, 23-bit Q-factor). Main clock timer, 17-bit Sub clock timer) Up to 56 MHz external clock Watchdog Timer 32-100 kHz subsystem quartz clock CAN 100kHz/2MHz internal RC clock for quick and safe startup, oscillator stop detection, watchdog Supports CAN protocol version 2.0 part A and B Clock source selectable from main- and subclock oscillator ISO16845 certified (part number suffix W) and on-chip RC oscillator, indepen- Bit rates up to 1 Mbit/s dently for CPU and 2 clock domains of peripherals. 32 message objects Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode) Each message object has its own identifier mask Clock modulator Programmable FIFO mode (concatenation of message objects) On-chip voltage regulator Maskable interrupt Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power consumption figures Disabled Automatic Retransmission mode for Time Triggered CAN applications Low voltage reset Programmable loop-back mode for self-test operation Reset is generated when supply voltage is below minimum. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04592 Rev. *A Revised April 22, 2016 MB96310 Series USART Real Time Clock Full duplex USARTs (SCI/LIN) Can be clocked either from sub oscillator (devices with part number suffix W), main oscillator or from the RC oscillator Wide range of baud rate settings using a dedicated reload timer Facility to correct oscillation deviation of Sub clock or RC Special synchronous options for adapting to different oscillator clock (clock calibration) synchronous serial protocols Read/write accessible second/minute/hour registers LIN functionality working either as master or slave LIN device Can signal interrupts every half A/D converter second/second/minute/hour/day SAR-type Internal clock divider and prescaler provide exact 1s clock 10-bit resolution External Interrupts Signals interrupt on conversion end, single conversion mode, Edge sensitive or level sensitive continuous conversion mode, stop conversion mode, activation by software, external trigger or reload timer Interrupt mask and pending bit per channel Each available CAN channel RX has an external interrupt for Reload Timers wake-up 16-bit wide Selected USART channels SIN have an external interrupt for 1 2 3 4 5 6 Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral wake-up clock frequency Non Maskable Interrupt Event count function Disabled after reset Free Running Timers Once enabled, can not be disabled other than by reset. Signals an interrupt on overflow, supports timer clear upon 1 2 Level high or level low sensitive match with Output Compare (0, 4), Prescaler with 1, 1/2 , 1/2 , 3 4 5 6 7 8 1/2 , 1/2 , 1/2 , 1/2 , 1/2 ,1/2 of peripheral clock frequency Pin shared with external interrupt 0. Input Capture Units I/O Ports 16-bit wide Virtually all external pins can be used as general purpose I/O Signals an interrupt upon external event All push-pull outputs Rising edge, falling edge or rising & falling edge sensitive Bit-wise programmable as input/output or peripheral signal Output Compare Units Bit-wise programmable input enable 16-bit wide Bit-wise programmable input levels: Automotive / CMOS-Schmitt trigger / TTL Signals an interrupt when a match with 16-bit I/O Timer occurs Bit-wise programmable pull-up resistor A pair of compare registers can be used to generate an output signal. Bit-wise programmable output driving strength for EMI optimization Programmable Pulse Generator Packages 16-bit down counter, cycle and duty setting registers 48-pin plastic LQFP M26 Interrupt at trigger, counter borrow and/or duty match PWM operation and one-shot operation Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock and Reload timer underflow as clock input Can be triggered by software or reload timer Document Number: 002-04592 Rev. *A Page 2 of 81