S25FL208K 8-Mbit 3.0V Serial Flash Memory with Uniform 4 kB Sectors Distinctive Features Single power supply operation Flexible Architecture with 4 kB Sectors Full voltage range: 2.7 to 3.6V Sector Erase (4 kB) Block Erase (64 kB) 8-Mbit Serial Flash Page Program up to 256 bytes 8-Mbit/1024 kbyte/4096 pages 100k erase/program cycles typical 256 bytes per programmable page 20-year data retention typical Uniform 4-kbyte Sectors/64-kbyte Blocks Software and Hardware Write Protection Standard and Dual Write Protect all or portion of memory via software Standard SPI: SCK, CS , SI, SO, WP , HOLD Enable/Disable protection with WP pin Dual SPI: SCK, CS , SI/IO0, SO, WP , HOLD Fast Read Dual Output instruction High Performance Program/Erase Speed Auto-increment Read capability Page program time: 1.5 ms typical Sector erase time (4 kB): 50 ms typical High Performance Block erase time (64 kB): 500 ms typical FAST READ (Serial): 76 MHz clock rate Chip erase time: 7 seconds typical DUAL OUTPUT READ: 76 MHz clock rate Package Options Low Power Consumption 8-pin SOIC 150/208-mil 12 mA typical active current All Pb-free packages are RoHS compliant 15 A typical standby current General Description The S25FL208K (8-Mbit, 1024-kbyte) Serial Flash memory, with advanced write protection mechanisms. The S25FL208K supports the standard Serial Peripheral Interface (SPI), and a high performance Dual output using SPI pins: Serial Clock, Chip Select, Serial SI/IO0, SO, WP and HOLD . SPI clock frequencies of up to 76 MHz are supported along with a clock rate of 76 MHz for Dual Output Read. The S25FL208K array is organized into 4,096 programmable pages of 256 bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4-kB Sector Erase)Document Number: 002-00721 Rev. *HDocument Number: 002- 00721 Rev. *H, groups of 256 (64-kB Block Erase) or the entire chip (Chip Erase). The S25FL208K has 256 erasable sectors and 16 erasable blocks. The small 4 kB sectors allow for greater flexibility in applications that require data and parameter storage. A Hold pin, Write Protect Pin and programmable write protection provide further control flexibility. Additionally, the S25FL208K device supports JEDEC standard manufacturer and device identification. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00721 Rev. *H Revised May 30, 2017 Not recommended for new designsS25FL208K Contents Distinctive Features ............................................................. 1 8.3 Read Status Register (05h) .......................................... 12 8.4 Write Status Register (01h)........................................... 13 General Description ............................................................. 1 8.5 Read Data (03h) ........................................................... 14 1. Block Diagram.............................................................. 3 8.6 Fast Read (0Bh) ........................................................... 14 8.7 Fast Read Dual Output (3Bh) ....................................... 15 2. Connection Diagrams.................................................. 3 8.8 Page Program (PP) (02h) ............................................. 16 3. Signal Descriptions ..................................................... 4 8.9 Sector Erase (SE) (20h)................................................ 17 8.10 Block Erase (BE) (D8h)................................................. 18 4. Ordering Information................................................... 5 8.11 Chip Erase (CE) (C7h).................................................. 18 4.1 Valid Combinations........................................................ 5 8.12 Deep Power-down (DP) (B9h) ...................................... 19 5. Memory Organizations ................................................ 6 8.13 Release Deep Power-down / Device ID (ABh) ............. 20 8.14 Read Manufacturer / Device ID (90h) ........................... 21 6. Functional Description................................................ 7 8.15 Read Identification (RDID) (9Fh) .................................. 22 6.1 SPI Modes ..................................................................... 7 6.2 Dual Output SPI............................................................. 7 9. Electrical Specifications............................................. 24 6.3 Hold Function................................................................. 7 9.1 Power-up Timing........................................................... 24 6.4 Status Register .............................................................. 8 9.2 Absolute Maximum Ratings .......................................... 25 9.3 Recommended Operating Ranges ............................... 25 7. Write Protection ........................................................... 8 9.4 DC Characteristics........................................................ 26 7.1 Page Programming...................................................... 10 9.5 AC Measurement Conditions........................................ 26 7.2 Sector Erase, Block Erase, and Chip Erase ................ 10 9.6 AC Characteristics ........................................................ 27 7.3 Polling During a Write, Program, or Erase Cycle......... 10 7.4 Active Power, Stand-by Power, and Deep Power- 10. Package Material......................................................... 30 Down Modes 10 10.1 8-Pin SOIC 150-mil Package (SOA 008)...................... 30 10.2 8-Pin SOIC 208-mil Package (SOC 008)...................... 31 8. Commands ................................................................. 10 8.1 Write Enable (06h)....................................................... 11 11. Revision History.......................................................... 32 8.2 Write Disable (04h) ...................................................... 12 Document Number: 002-00721 Rev. *H Page 2 of 33 Not recommended for new designs